Method of manufacturing a semiconductor device having frame structures laterally surrounding backside metal structures

US11990520B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11990520-B2
Application numberUS-202117532030-A
CountryUS
Kind codeB2
Filing dateNov 22, 2021
Priority dateDec 17, 2018
Publication dateMay 21, 2024
Grant dateMay 21, 2024

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of manufacturing a semiconductor device includes: providing a silicon carbide substrate that includes device regions and a grid-shaped kerf region laterally separating the device regions; forming a mold structure on a backside surface of the grid-shaped kerf region; forming backside metal structures on a backside surface of the device regions; and separating the device regions, wherein parts of the mold structure form frame structures laterally surrounding the backside metal structures.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a semiconductor device, the method comprising: providing a silicon carbide substrate that comprises a plurality of device regions and a grid- shaped kerf region laterally separating the device regions; forming a mold structure from a mold material that includes glass, ceramic or a polymer-based material, on a backside surface of the grid-shaped kerf region which faces an opposite direction as a front side surface of the silicon carbide substrate and in which the device regions are formed; forming backside metal structures on a backside surface of the device regions which faces the same direction as the backside surface of the grid-shaped kerf region and the opposite direction as the front side surface in which the device regions are formed; separating the device regions; and prior to forming the mold structure, providing an auxiliary structure that comprises stencil sections, wherein the stencil sections are provided on the backside surface of the device regions and each stencil section is assigned to one device region, wherein the mold structure fills a space between the stencil sections, wherein parts of the mold structure form frame structures laterally surrounding the backside metal structures. 2. The method of claim 1 , further comprising: after forming the mold structure, removing the auxiliary structure. 3. The method of claim 2 , further comprising: after removing the auxiliary structure, forming at least a portion of the backside metal structures in spaces left by removing the stencil sections. 4. The method of claim 3 , further comprising: prior to providing the auxiliary structure, forming a metal seed layer on the backside surface of the device regions, wherein forming the backside metal structures comprises electrochemical deposition of a main metal portion on exposed sections of the metal seed layer in the spaces. 5. The method of claim 1 , wherein a center-to-center distance between neighboring ones of the device regions is equal to a center-to-center distance between neighboring ones of the stencil sections. 6. The method of claim 1 , wherein a layer section of the auxiliary structure mechanically connects the stencil sections. 7. The method of claim 1 , wherein providing the auxiliary structure comprises: pre-fabricating the auxiliary structure; and structurally connecting the pre-fabricated auxiliary structure with the silicon carbide substrate. 8. The method of claim 7 , wherein structurally connecting the pre-fabricated auxiliary structure with the silicon carbide substrate comprises bonding, sintering and/or diffusion soldering. 9. The method of claim 7 , wherein pre-fabricating the auxiliary structure comprises: filling a plurality of laterally separated grooves in a top surface of an auxiliary base to form the stencil sections in the grooves; mechanically connecting the stencil sections with the silicon carbide substrate; and after mechanically connecting the stencil sections with the silicon carbide substrate, removing the auxiliary base. 10. The method of claim 7 , wherein the pre-fabricated auxiliary structure is perforated and includes at least one hole and/or at least one recess. 11. The method of claim 10 , wherein the stencil sections are interconnected. 12. The method of claim 1 , wherein providing the auxiliary structure comprises: forming stepwise the auxiliary structure directly on a metal seed layer formed on the device regions. 13. The method of claim 12 , wherein the stencil sections are formed on sections of the metal seed layer formed on the backside surface of the device regions and are absent on a section of the metal seed layer formed on the backside surface of the grid-shaped kerf region. 14. The method of claim 12 , wherein a grid-shaped space laterally separating the stencil sections exposes a section of the metal seed layer formed on the backside surface of the grid-shaped kerf region. 15. The method of claim 1 , wherein the mold structure includes a layer portion formed outside the space between the stencil sections. 16. The method of claim 15 , further comprising: removing the layer portion of the mold structure to expose the stencil sections of the auxiliary structure. 17. The method of claim 1 , wherein the auxiliary structure is formed directly on the backside surface of the device regions. 18. The method of claim 1 , wherein the mold structure is formed by using a preform. 19. The method of claim 1 , wherein the backside metal structures are formed from a metal paste and/or stencil printing, and/or wherein the backside metal structures and/or at least a layer of the backside metal structures are formed by sputter deposition and/or vapor deposition. 20. A method of manufacturing a semiconductor device, the method comprising: providing a silicon carbide substrate that comprises a plurality of device regions and a grid-shaped kerf region laterally separating the device regions; forming a mold compound on a backside surface of the grid-shaped kerf region which faces an opposite direction as a front side surface of the silicon carbide substrate and in which the device regions are formed; forming backside metal structures on a backside surface of the device regions which faces the same direction as the backside surface of the grid-shaped kerf region and the opposite direction as the front side surface in which the device regions are formed; and separating the device regions, wherein parts of the mold compound form frame structures laterally surrounding the backside metal structures. 21. The method of claim 20 , wherein the mold compound comprises an epoxy resin.

Assignees

Inventors

Classifications

  • H10P54/00Primary

    Cutting or separating of wafers, substrates or parts of devices · CPC title

  • Silicon carbide · CPC title

  • forming a chip-scale package [CSP] · CPC title

  • using moulds · CPC title

  • Marks applied to devices, e.g. for alignment or identification · CPC title

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What does patent US11990520B2 cover?
A method of manufacturing a semiconductor device includes: providing a silicon carbide substrate that includes device regions and a grid-shaped kerf region laterally separating the device regions; forming a mold structure on a backside surface of the grid-shaped kerf region; forming backside metal structures on a backside surface of the device regions; and separating the device regions, wherein…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 21 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).