Gate metal formation on gallium nitride or aluminum gallium nitride

Patent metadata

Field	Value
Publication number	US-11990343-B2
Application number	US-201917288190-A
Country	US
Kind code	B2
Filing date	Dec 6, 2019
Priority date	Dec 7, 2018
Publication date	May 21, 2024
Grant date	May 21, 2024

Abstract

A method of manufacturing an electrode structure for a device, such as a GaN or AlGaN device is described. In one example, the method includes providing a substrate ( 212 ) of GaN or AlGaN with a surface region of the GaN or AlGaN exposed through an opening ( 216 ) in a layer of silicon nitride ( 214 ) formed on the substrate. The method further includes depositing layers of W ( 222 ), in one example, or Ni ( 220 ) and W ( 222 ), in another example, on the substrate and the layer of silicon nitride using reactive evaporation and photoresist layers ( 230 ) having an undercut profile for liftoff. The method further includes removing the photoresist layers having the undercut profile, and depositing layers of WN ( 224 ) and Al over the underlying layers of W or Ni and W by sputtering.

First claim

Therefore, the following is claimed:

1. A method of manufacturing an electrode structure for a device, comprising:
forming an opening in a silicon nitride layer to expose a surface region of a substrate through the opening;
forming a photoresist layer over the silicon nitride layer and around the opening in the silicon nitride layer, the photoresist layer comprising a mask opening;
depositing a gate metal layer through the mask opening and onto the surface region of the substrate;
removing the photoresist layer; and
depositing a barrier metal layer over the gate metal layer and the silicon nitride layer.

2. The method according to claim 1 , wherein depositing the gate metal layer comprises depositing the gate metal layer using reactive evaporation.

3. The method according to claim 1 , wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.

4. The method according to claim 1 , wherein depositing the gate metal layer comprises:
depositing a first gate metal layer using reactive evaporation; and
depositing a second gate metal layer using reactive evaporation.

5. The method of claim 4 , wherein the first gate metal layer is nickel and the second gate metal layer is tungsten.

6. The method according to claim 1 , wherein depositing the barrier metal layer comprises sputtering tungsten nitride over the gate metal layer, a top surface of the silicon nitride layer, and at least a portion of a step around the opening in the silicon nitride layer.

7. The method according to claim 1 , further comprising:
depositing a conductive metal layer on the barrier metal layer; and
depositing a cap metal layer on the conductive metal layer.

8. The method according to claim 7 , wherein the conductive metal layer comprises aluminum, and the cap metal layer comprises one of tungsten nitride, titanium nitride, and tungsten.

9. The method of claim 7 , further comprising:
forming a cap etch photoresist mask over the cap metal layer;
etching the cap metal layer, the conductive metal layer, the barrier metal layer, and the gate metal layer down to the silicon nitride layer around the cap etch photoresist mask; and
removing the cap etch photoresist mask.

10. The method according to claim 1 , wherein the photoresist layer comprises a first photoresist layer and a second photoresist layer, the second photoresist layer comprising an undercut profile for liftoff.

11. The method according to claim 1 , wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.

12. A gate metal formation, comprising:
a silicon nitride layer comprising an opening in the silicon nitride layer that exposes a surface region of a substrate, the opening comprising a step around the opening;
a gate metal layer on the surface region of the substrate and at least a portion of the silicon nitride layer;
a barrier metal layer on the gate metal layer, on a top surface of the silicon nitride layer, and on at least a portion of the step around the opening in the silicon nitride layer; and
a conductive metal layer on the barrier metal layer.

13. The gate metal formation according to claim 12 , wherein:
the gate metal layer is deposited using reactive evaporation; and
the barrier metal layer is deposited using sputtering.

14. The gate metal formation according to claim 12 , wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.

15. The gate metal formation according claim 12 , wherein the gate metal layer comprises a first gate metal layer and a second gate metal layer.

16. The gate metal formation according to claim 15 , wherein the first gate metal layer is nickel and the second gate metal layer is tungsten.

17. The gate metal formation according to claim 12 , wherein the barrier metal layer comprises tungsten nitride.

18. The gate metal formation according to claim 12 , further comprising a cap metal layer on the conductive metal layer.

19. The gate metal formation according to claim 12 , wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.

20. The gate metal formation according to claim 12 , wherein the gate metal formation comprises a gate connected field plate (GCFP) formed on the substrate with a width of about 1.1 microns.

Assignees

• Macom Tech Solutions Holdings Inc

Inventors

• Struble Wayne Mack
• Boles Timothy Edward
• Barrett Jason Matthew
• Atherton John Stephen

Classifications

• H10P76/403

  for lift-off processes · CPC title

• H10D64/0116 Primary

  to Group III-V semiconductors · CPC title

• H10D64/0124

  to Group III-V semiconductors · CPC title

• H10P76/202

  for lift-off processes · CPC title

• H10D64/0125 Primary

  characterised by the sectional shape, e.g. T or inverted T · CPC title