Use of quartz plates during growth of single crystal silicon ingots
US-12146236-B2 · Nov 19, 2024 · US
US11987901B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11987901-B2 |
| Application number | US-202217711691-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 1, 2022 |
| Priority date | Nov 11, 2020 |
| Publication date | May 21, 2024 |
| Grant date | May 21, 2024 |
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Methods for preparing single crystal silicon substrates for epitaxial growth are disclosed. The methods may involve control of the (i) a growth velocity, v, and/or (ii) an axial temperature gradient, G, during the growth of an ingot segment such that v/G is less than a critical v/G and/or is less than a value of v/G that depends on the boron concentration of the ingot. Methods for preparing epitaxial wafers are also disclosed.
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What is claimed is: 1. A method for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects, the silicon substrate being boron doped, the method comprising: adding an initial charge of polycrystalline silicon to a crucible; heating the crucible comprising the initial charge of polycrystalline silicon to cause a silicon melt to form in the crucible; adding boron to the crucible to produce a doped silicon melt; contacting a silicon seed crystal with the doped silicon melt; withdrawing the silicon seed crystal to grow a single crystal silicon ingot, the ingot having a constant diameter portion, wherein a segment of the constant diameter portion of the ingot has a boron concentration from 2.8×10 18 atoms/cm 3 to 5.4×10 18 atoms/cm 3 ; controlling (i) a growth velocity, v, and/or (ii) an axial temperature gradient, G, during the growth of the segment such that v/G is less than 0.20 mm 2 /(min*K) and interstitials are the dominant intrinsic point defect in the segment; cooling the segment of the constant diameter portion of the ingot from its solidification temperature to 950° C. or less, wherein the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150° C. to 950° C. is less than 160 minutes; and slicing the substrate from the single crystal silicon ingot. 2. The method as set forth in claim 1 wherein the constant diameter portion has a length D, the length of the segment being at least 0.5*D. 3. The method as set forth in claim 1 wherein the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150° C. to 950° C. is less than 120 minutes. 4. The method as set forth in claim 1 wherein the melt is not doped with carbon. 5. The method as set forth in claim 1 wherein the length of the segment is the entire constant diameter portion of the ingot. 6. The method as set forth in claim 1 wherein the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150° C. to 950° C. is less than 60 minutes. 7. A method for preparing an epitaxial structure, the method comprising: forming the silicon substrate by the method of claim 1 ; and contacting a front surface of the silicon substrate with a silicon-containing gas, the silicon-containing gas decomposing to form an epitaxial silicon layer on the silicon substrate. 8. The method as set forth in claim 1 wherein a single dopant is added to the melt, the single dopant being boron. 9. A method for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects, the silicon substrate being boron doped, the method comprising: adding an initial charge of polycrystalline silicon to a crucible; heating the crucible comprising the initial charge of polycrystalline silicon to cause a silicon melt to form in the crucible; adding boron to the crucible to produce a doped silicon melt; contacting a silicon seed crystal with the doped silicon melt; withdrawing the silicon seed crystal to grow a single crystal silicon ingot, the ingot having a constant diameter portion, wherein a segment of the constant diameter portion of the ingot has a boron concentration from 5.4×10 18 atoms/cm 3 to 8.0×10 18 atoms/cm 3 ; controlling (i) a growth velocity, v, and/or (ii) an axial temperature gradient, G, during the growth of the segment such that v/G is less than 0.25 mm 2 /(min*K) and interstitials are the dominant intrinsic point defect in the segment; cooling the segment of the constant diameter portion of the ingot from its solidification temperature to 950° C. or less, wherein the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150° C. to 950° C. is less than 160 minutes; and slicing the substrate from the single crystal silicon ingot. 10. The method as set forth in claim 9 wherein the constant diameter portion has a length D, the length of the segment being at least 0.5*D. 11. The method as set forth in claim 9 wherein the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150° C. to 950° C. is less than 120 minutes. 12. The method as set forth in claim 9 wherein the melt is not doped with carbon. 13. The method as set forth in claim 9 wherein the length of the segment is the entire constant diameter portion of the ingot. 14. The method as set forth in claim 9 wherein the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150° C. to 950° C. is less than 60 minutes. 15. A method for preparing an epitaxial structure, the method comprising: forming the silicon substrate by the method of claim 9 ; and contacting a front surface of the silicon substrate with a silicon-containing gas, the silicon-containing gas decomposing to form an epitaxial silicon layer on the silicon substrate. 16. The method as set forth in claim 9 wherein a single dopant is added to the melt, the single dopant being boron.
Silicon · CPC title
Pulling on a substrate · CPC title
adding doping materials, e.g. for n-p-junction · CPC title
Heating of the melt or the crystallised materials · CPC title
the relationship of pull rate (v) to axial thermal gradient (G) · CPC title
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