Thermal solution for massively parallel testing

US11940487B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11940487-B2
Application numberUS-202318094899-A
CountryUS
Kind codeB2
Filing dateJan 9, 2023
Priority dateOct 1, 2020
Publication dateMar 26, 2024
Grant dateMar 26, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for thermal control of a device under test (DUT), the apparatus comprising: a cooling structure operable to provide cooling, said cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof; a variable thermal conductance material (VTCM) layer disposed on a surface of said cooling structure; a heater layer operable to generate heat based on an electronic control, and wherein said VTCM layer is operable to transfer cooling from said cooling structure to said heater layer; a thermal interface material layer disposed on said heater layer, and operable to provide thermal coupling and mechanical compliance with respect to said DUT; and a compression mechanism for providing compression to said VTCM layer to vary a thermal conductance of said VTCM layer. 2. An apparatus as described in claim 1 wherein a temperature of said thermal interface material layer is controlled by varying said electronic control to said heater layer and further by varying an amount of compression applied to said VTCM layer from said compression mechanism. 3. An apparatus as described in claim 1 wherein said compression mechanism comprises a plunger that is pneumatically controlled. 4. An apparatus as described in claim 1 wherein said VTCM layer comprises a material that varies in thermal conductance responsive to compression thereof. 5. An apparatus as described in claim 1 wherein said cooling material is a cooling liquid. 6. An apparatus as described in claim 1 wherein said heater layer comprises a ceramic heater layer. 7. An apparatus as described in claim 1 wherein said heater layer comprises an aluminum nitride layer. 8. An apparatus as described in claim 1 wherein said thermal interface material layer comprises one of: indium; and graphite. 9. An apparatus as described in claim 8 wherein said thermal interface material layer comprises an integrated temperature sensor. 10. An apparatus as described in claim 1 wherein said DUT is a packaged memory device. 11. An apparatus for thermal control of an electronic device under test (DUT), the apparatus comprising: a cooling structure operable to provide cooling and comprising an inlet port and an outlet port, said cooling structure operable to inlet cooling liquid via the inlet port thereof and operable to outlet cooling liquid via the outlet port; a variable thermal conductance material (VTCM) layer disposed on a surface of said cooling structure, wherein a thermal conductance characteristic of said VTCM varies with compression thereof; a heater layer operable to generate heat based on an electronic control signal, and wherein said VTCM layer is operable to transfer cooling from said cooling structure to said heater layer; a thermal interface material layer disposed on said heater layer, wherein said thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to said DUT; and a compression mechanism for providing compression to said VTCM layer to vary said thermal conductance characteristic thereof. 12. An apparatus as described in claim 11 wherein a temperature of said thermal interface material layer is controlled by varying said electronic control to said heater layer and further by varying an amount of compression applied to said VTCM layer from said compression mechanism. 13. An apparatus as described in claim 11 wherein said compression mechanism is a plunger that is pneumatically controlled. 14. An apparatus as described in claim 11 wherein said heater layer comprises a ceramic heater layer. 15. An apparatus as described in claim 11 wherein said heater layer comprises an aluminum nitride layer. 16. An apparatus as described in claim 11 wherein said thermal interface material layer comprises one of: indium; and graphite. 17. An apparatus as described in claim 11 wherein said thermal interface material layer comprises an integrated temperature sensor. 18. An apparatus as described in claim 11 wherein said DUT is a packaged memory device. 19. An apparatus for performing thermal control and testing of a device under test (DUT), the apparatus comprising: a cooling structure operable to provide cooling; a variable thermal conductance material (VTCM) layer disposed on a surface of said cooling structure, wherein a thermal conductance characteristic of said VTCM varies with compression thereof; a heater layer operable to generate heat based on an electronic control, and wherein said VTCM layer is operable to transfer cooling from said cooling structure to said heater layer; a thermal interface material layer disposed on said heater layer, wherein said thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to said DUT; a computer system for implementing a method of testing said DUT, said method comprising: applying input test signals to DUT; and retrieving output signals from said DUT responsive to said input test signals. 20. An apparatus as described in claim 19 wherein said thermal interface material layer further comprises an integrated temperature sensor; and the method further comprises varying a temperature of said DUT by varying said electronic control to said heater layer and further by varying an amount of compression applied to said VTCM layer, both responsive to said integrated temperature sensor.

Assignees

Inventors

Classifications

  • related to sensing or controlling of force, position, temperature (G01R31/2874 takes precedence; sensing of force G01L; sensing of position G01B, G01D; sensing of temperature G01K; controlling in general G05) · CPC title

  • related to heating · CPC title

  • related to cooling · CPC title

  • Interfaces, e.g. between probe and tester (G01R31/31905 and G01R1/07364 take precedence) · CPC title

  • Complete testing stations; systems; procedures; software aspects · CPC title

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What does patent US11940487B2 cover?
An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operab…
Who is the assignee on this patent?
Advantest Test Solutions Inc
What technology area does this patent fall under?
Primary CPC classification G01R31/2891. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).