Semiconductor device and method for manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-11935964-B2
Application number	US-201917278828-A
Country	US
Kind code	B2
Filing date	Oct 1, 2019
Priority date	Oct 12, 2018
Publication date	Mar 19, 2024
Grant date	Mar 19, 2024

Abstract

A semiconductor device having high reliability is provided. The semiconductor device includes a transistor and an insulator placed so as to surround the transistor; the insulator has a barrier property against hydrogen; the transistor includes an oxide and a conductor; the conductor includes nitrogen and a metal; the conductor has a physical property of extracting hydrogen; the conductor includes a region having a hydrogen concentration higher than or equal to 2.0×10 19 atoms/cm 3 and lower than or equal to 1.0×10 21 atoms/cm 3 ; and at least part of hydrogen atoms included in the region is bonded to a nitrogen atom.

First claim

The invention claimed is:

1. A semiconductor device comprising a transistor,
wherein the transistor includes an oxide semiconductor, a first conductor as a source electrode or a drain electrode over and in contact with the oxide semiconductor, a first insulator in contact with a top surface and a side surface of the first conductor, and a second conductor as a gate electrode embedded in an opening of the first insulator,
wherein the first conductor includes nitrogen and tantalum, and
wherein the first conductor includes a region having a hydrogen concentration higher than or equal to 2.0×10 19 atoms/cm 3 and lower than or equal to 1.0×10 21 atoms/cm 3 .

2. The semiconductor device according to claim 1 , further comprising a second insulator surrounding the transistor,
wherein the second insulator has a barrier property against hydrogen, and
wherein heat treatment is performed at higher than or equal to 350° C. and lower than or equal to 700° C. after the second insulator is formed, so that hydrogen in the oxide semiconductor is absorbed by the second insulator.

3. The semiconductor device according to claim 1 , further comprising a second insulator surrounding the transistor,
wherein the second insulator has a barrier property against hydrogen, and
wherein the second insulator includes nitrogen and silicon.

4. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor includes indium, an element M (M is aluminum, gallium, yttrium, or tin), and zinc.

5. A semiconductor device comprising:
a first insulator;
a first oxide semiconductor over the first insulator;
a second oxide semiconductor over the first oxide semiconductor;
a first conductor as a source electrode or a drain electrode over and in contact with the second oxide semiconductor;
a second insulator in contact with a top surface and a side surface of the first conductor;
a second conductor as a gate electrode embedded in an opening of the second insulator; and
a third insulator over the second conductor,
wherein the first conductor includes nitrogen and tantalum,
wherein the first conductor has a physical property of extracting hydrogen,
wherein the first conductor includes a region having a hydrogen concentration higher than or equal to 2.0×10 19 atoms/cm 3 and lower than or equal to 1.0×10 21 atoms/cm 3 , and
wherein at least part of hydrogen atoms included in the region is bonded to a nitrogen atom.

6. The semiconductor device according to claim 5 ,
wherein each of the first insulator and the third insulator has a barrier property against hydrogen,
wherein the third insulator includes a region in contact with the first insulator, and
wherein each of the first insulator and the third insulator includes nitrogen and silicon.

7. The semiconductor device according to claim 5 ,
wherein the first oxide semiconductor includes indium, an element M (M is aluminum, gallium, yttrium, or tin), and zinc.

8. A semiconductor device comprising a transistor,
wherein the transistor includes an oxide semiconductor, a first conductor as a source electrode or a drain electrode over and in contact with the oxide semiconductor, a first insulator in contact with a top surface and a side surface of the first conductor, and a second conductor as a gate electrode embedded in an opening of the first insulator,
wherein the oxide semiconductor includes a channel formation region,
wherein the first conductor includes nitrogen and tantalum, and
wherein the first conductor includes a region where an atomic ratio of nitrogen to tantalum in the first conductor change continuously such that an atomic ratio of nitrogen to tantalum at a bottom surface of the first conductor is higher than an atomic ratio of nitrogen to tantalum at the top surface of the first conductor.

9. The semiconductor device according to claim 8 , further comprising a second insulator surrounding the transistor,
wherein the second insulator has a barrier property against hydrogen, and
wherein heat treatment is performed at higher than or equal to 350° C. and lower than or equal to 700° C. after the second insulator is formed, so that hydrogen in the oxide semiconductor is absorbed by the second insulator.

10. The semiconductor device according to claim 8 , further comprising a second insulator surrounding the transistor,
wherein the second insulator has a barrier property against hydrogen, and
wherein the second insulator includes nitrogen and silicon.

11. The semiconductor device according to claim 8 ,
wherein the oxide semiconductor includes indium, an element M (M is aluminum, gallium, yttrium, or tin), and zinc.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Komatsu Yoshihiro
• Ohno Toshikazu

Classifications

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D84/0128

  Manufacturing their channels · CPC title

• H10D84/038

  using silicon technology, e.g. SiGe · CPC title

• H10D84/00

  Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers · CPC title