Error avoidance based on voltage distribution parameters of block families

Patent metadata

Field	Value
Publication number	US-11915776-B2
Application number	US-202217943123-A
Country	US
Kind code	B2
Filing date	Sep 12, 2022
Priority date	Mar 30, 2021
Publication date	Feb 27, 2024
Grant date	Feb 27, 2024

Abstract

A method can include receiving a request to read data from a block of a memory device, identifying a block family associated with the block of the memory device, identifying a voltage distribution parameter value associated with the block family, wherein the voltage distribution parameter value reflects an aggregate value of a corresponding voltage distribution associated with a plurality of memory cells of the block family, and determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block of the memory device. The block family can be identified using a data structure that maps block identifiers to corresponding block family identifiers. The voltage distribution parameter value can be identified using a data structure that maps block family identifiers to corresponding voltage parameter values.

First claim

What is claimed is:

1. A method comprising:
receiving, by a processing device, a request to read data from a block of a memory device coupled with the processing device;
identifying a block family associated with the block of the memory device;
identifying a voltage distribution parameter value associated with the block family, wherein the voltage distribution parameter value is based on a feature of a corresponding voltage distribution associated with a plurality of memory cells of the block family; and
determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block of the memory device.

2. The method of claim 1 , wherein the block family is identified using a data structure that maps block identifiers to corresponding block family identifiers.

3. The method of claim 2 , wherein the data structure that maps block identifiers to corresponding block family identifiers comprises a block metadata table, wherein the block metadata table comprises a plurality of records, each record mapping one or more block identifiers to a block family identifier, and wherein determining, using the data structure, the block family associated with the block of the memory device further comprises:
identifying, in the block metadata table, a block identifier of the block of the memory device, wherein the block metadata table associates the block identifier with a block family identifier, and the block family corresponds to the block family identifier.

4. The method of claim 1 , wherein the voltage distribution parameter value is identified using a data structure that maps block family identifiers to corresponding voltage parameter values.

5. The method of claim 4 , wherein the data structure that maps block family identifiers to corresponding voltage distribution parameter values comprises a block family metadata table, wherein the block family metadata table comprises a plurality of records, each record mapping a value of a block family identifier to a value of a voltage distribution parameter, and determining, using the data structure, the voltage distribution parameter value associated with the block family comprises:
identifying, in the block family metadata table, a block family identifier value that corresponds to the block family, wherein the voltage distribution parameter value corresponds to the block family identifier value in the block family metadata table.

6. The method of claim 5 , wherein determining, using the data structure, the voltage distribution parameter value associated with the block family further comprises:
determining whether the block family metadata table includes an association between the block family identifier value that corresponds to the block family and a corresponding voltage distribution parameter value; and
responsive to determining that the block family metadata table does not include an association between the block family identifier value and a corresponding voltage distribution parameter value:
identifying a particular voltage distribution of the at least one memory cell by sampling the at least one memory cell at one or more voltage levels,
determining the voltage distribution parameter value based on the particular voltage distribution of the at least one memory cell, and
storing the voltage distribution parameter value in the block family metadata table in association with the block family identifier value.

7. The method of claim 1 , wherein determining the set of read levels associated with the voltage distribution parameter value comprises:
determining the set of read levels using a voltage mapping table, wherein the voltage mapping table comprises a plurality of records, each record mapping a value of a voltage distribution parameter to a set of values of read levels.

8. The method of claim 7 , wherein determining the set of read levels using a voltage mapping table comprises:
determining whether the voltage mapping table includes the voltage distribution parameter value; and
responsive to determining that the voltage mapping table includes the voltage distribution parameter value, retrieving the set of read levels from the voltage mapping table,
wherein the voltage mapping table associates the voltage distribution parameter value with the set of read levels.

9. The method of claim 1 , further comprising:
identifying at least one second block of the memory device that satisfies one or more calibration criteria;
performing a calibration operation for each identified second block that satisfies the calibration criteria, wherein performing the calibration operation comprises:
determining a second voltage distribution parameter value based on the second block of the memory device;
determining, using a data structure that maps block identifiers to corresponding block family identifiers, a second block family identifier associated with the second block of the memory device; and
storing the second voltage distribution parameter value in a data structure that maps block family identifiers to corresponding voltage distribution parameter values, wherein the second voltage distribution parameter value is stored in the data structure in association with the second block family identifier.

10. The method of claim 9 , wherein the at least one second block of the memory device that satisfies one or more calibration criteria comprises at least one block for which a time since program has increased by at least a threshold amount since a previous calibration operation was performed on the at least one block.

11. The method of claim 1 , further comprising:
reading, using the determined set of read levels, data from the block of the memory device.

12. The method of claim 11 , wherein reading, using the determined set of read levels, data from the block comprises:
measuring a voltage of the at least one memory cell; and
identifying a logical level to which the voltage corresponds, wherein identifying the logical level comprises comparing the measured voltage to one or more of the read levels,
wherein the data read from the block comprises the identified logical level.

13. A system comprising:
a memory; and
a processing device communicably coupled to the memory, the processing device to perform operations comprising:
receiving a request to read data from a block of the memory;
determining a voltage distribution parameter value associated with the block of the memory, wherein the voltage distribution parameter value is based on a feature of a corresponding voltage distribution associated with a plurality of memory cells of the block; and
determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block of the memory.

14. The system of claim 13 , wherein the voltage distribution parameter value is determined using a data structure that maps one or more sets of block identifiers to corresponding voltage distribution parameter values.

15. The system of claim 14 , wherein the data structure that maps block identifiers to corresponding voltage distribution parameter values comprises a block metadata table, wherein the block metadata table comprises a plurality of records, each record mapping a set of block identifiers to a corresponding voltage distribution parameter value, and wherein determining, using the data structure, the voltag

Assignees

• Micron Technology Inc

Inventors

• Sheperek Michael
• Muchherla Kishore Kumar
• Nowell Shane
• Kaynak Mustafa N
• Koudele Larry J

Classifications

• G11C29/56008 Primary

  Error analysis, representation of errors · CPC title

• G11C16/26 Primary

  Sensing or reading circuits; Data output circuits · CPC title

• G11C16/3431 Primary

  Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step · CPC title

• G11C16/30

  Power supply circuits · CPC title

• G11C5/143

  Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels (G11C5/148 takes precedence); Switching between alternative supplies (G11C5/141 takes precedence) · CPC title