Variable resistance memory device

Patent metadata

Field	Value
Publication number	US-11856873-B2
Application number	US-202117395040-A
Country	US
Kind code	B2
Filing date	Aug 5, 2021
Priority date	Mar 17, 2021
Publication date	Dec 26, 2023
Grant date	Dec 26, 2023

Abstract

A variable resistance memory may include first and second conductive elements spaced apart from each other on a variable resistance layer. The variable resistance layer may include first to third oxide layers sequentially arranged in a direction perpendicular to a direction in which the first and second conductive elements are arranged. A dielectric constant of the second oxide layer may be greater than dielectric constants of the first and third oxide layers.

First claim

What is claimed is:

1. A variable resistance memory device comprising:
an insulating layer;
a variable resistance layer on the insulating layer;
a channel layer on the variable resistance layer;
a gate insulating layer on the channel layer; and
a plurality of gate electrodes on the gate insulating layer,
wherein the plurality of gate electrodes are spaced apart from each other,
wherein the variable resistance layer includes a first oxide layer, a second oxide layer, and a third oxide layer sequentially arranged on the insulating layer, and
wherein a dielectric constant of the second oxide layer is greater than a dielectric constant of the first oxide layer and a dielectric constant of the third oxide layer.

2. The variable resistance memory device of claim 1 , wherein
the dielectric constant of the second oxide layer with respect to the dielectric constant of the first oxide layer or the third oxide layer is greater than or equal to 1.5.

3. The variable resistance memory device of claim 1 ,
wherein the dielectric constant of the second oxide layer is greater than or equal to 13.

4. The variable resistance memory device of claim 1 ,
wherein the dielectric constant of the first oxide layer or the dielectric constant of the third oxide layer is greater than or equal to 7.

5. The variable resistance memory device of claim 1 ,
wherein a thickness of the second oxide layer is less than or equal to a thickness of the first oxide layer.

6. The variable resistance memory device of claim 1 ,
wherein a thickness of the second oxide layer is less than or equal to three atomic layers.

7. The variable resistance memory device of claim 1 ,
wherein a thickness of the second oxide layer is smallest among thicknesses of the first oxide layer, the second oxide layer, and the third oxide layer.

8. The variable resistance memory device of claim 1 ,
wherein a thickness of the second oxide layer is less than or equal to 1 nm.

9. The variable resistance memory device of claim 1 ,
wherein a resistance ratio of a high resistive state to a low resistive state of the variable resistance layer is greater than or equal to 2000 at 4V of a voltage difference between the plurality of gate electrodes.

10. The variable resistance memory device of claim 1 ,
wherein the first oxide layer and the third oxide layer include a same material.

11. The variable resistance memory device of claim 1 , wherein at least one of the first oxide layer, the second oxide layer, and the third oxide layer comprises at least one material selected from the group consisting of zirconium (Zr), hafnium (Hf), aluminum (Al), nickel (Ni), copper (Cu), molybdenum (Mo), tantalum (Ta), titanium (Ti), tungsten (W), chromium (Cr), strontium (Sr), lanthanum (La), manganese (Mn), calcium (Ca), praseodymium (Pr), and silicon (Si).

12. The variable resistance memory device of claim 1 ,
wherein the second oxide layer comprises at least one of HfO 2 and ZrO 2 , and
wherein the first oxide layer comprises Al 2 O 3 and CaO.

13. The variable resistance memory device of claim 1 ,
wherein when a current flows through the variable resistance layer, a current density of the second oxide layer is greater than a current density of the first oxide layer and a current density of the third oxide layer.

14. A variable resistance memory device comprising:
a variable resistance layer;
a first conductive element on the variable resistance layer;
and second conductive element on the variable resistance layer and spaced apart from the first conductive element, wherein
the variable resistance layer includes a first oxide layer, a second oxide layer, and a third oxide layer sequentially arranged in a direction perpendicular to a direction in which the first conductive element and the second conductive element are arranged, and
a dielectric constant of the second oxide layer is greater than a dielectric constant of the first oxide layer and a dielectric constant of the third oxide layer.

15. The variable resistance memory device of claim 14 ,
wherein a dielectric constant ratio of the second oxide layer with respect to the dielectric constant of the first oxide layer or the dielectric constant of the third oxide layer is greater than or equal to 1.5.

16. The variable resistance memory device of claim 14 ,
wherein the dielectric constant of the second oxide layer is greater than or equal to 13, and
the dielectric constant of the first oxide layer or the dielectric constant of the third oxide layer is greater than or equal to 7.

17. The variable resistance memory device of claim 14 ,
wherein a thickness of the second oxide layer is less than or equal to a thickness of the first oxide layer.

18. The variable resistance memory device of claim 14 ,
wherein a thickness of the second oxide layer is less than or equal to three atomic layers.

19. The variable resistance memory device of claim 14 ,
wherein a thickness of the second oxide layer is smallest among thicknesses of the first oxide layer, the second oxide layer, and the third oxide layer.

20. The variable resistance memory device of claim 14 ,
wherein the first oxide layer and the third oxide layer include a same material.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Mizusaki Soichiro
• Kim Doyoon
• Kim Seyun
• Kim Yumin
• Kim Jinhong
• Cho Youngjin

Classifications

• H10N70/24 Primary

  based on migration or redistribution of ionic species, e.g. anions, vacancies · CPC title

• H10B63/34

  of the vertical channel field-effect transistor type · CPC title

• H10B63/845

  the switching components being connected to a common vertical conductor · CPC title

• H10N70/8833

  Binary metal oxides, e.g. TaOx · CPC title

• G11C13/0007 Primary

  comprising metal oxide memory material, e.g. perovskites · CPC title