Plasma co-doping to reduce the forming voltage in resistive random access memory (ReRAM) devices

Patent metadata

Field	Value
Publication number	US-11844290-B2
Application number	US-202117337562-A
Country	US
Kind code	B2
Filing date	Jun 3, 2021
Priority date	Jun 3, 2021
Publication date	Dec 12, 2023
Grant date	Dec 12, 2023

Abstract

Embodiments of process flows and methods are provided for forming a resistive switching random access memory (ReRAM). More specifically, process flows and methods are provided for reducing the forming voltage needed to form a conductive path in the ReRAM cells. A wide variety of plasma doping processes are used to introduce a plurality of different dopants into a metal-oxide dielectric film. By utilizing at least two different dopants, the plasma doping processes described herein reduce the forming voltage of the subsequently formed ReRAM cell compared to conventional processes that use only one dopant. In some embodiments, the forming voltage may be further reduced by applying a bias power during the plasma doping process, wherein the bias power is preselected to increase the number of ions introduced into the metal-oxide dielectric film during the plasma doping process.

First claim

What is claimed is:

1. A method of forming a resistive random access memory (ReRAM) device, the method comprising:
forming a first electrode layer on a substrate;
forming a dielectric film on the first electrode layer, wherein the dielectric film comprises a metal oxide;
exposing the dielectric film to at least one plasma to introduce a plurality of dopants, including a hydrogen dopant and a silicon dopant, into the dielectric film to form a plasma doped dielectric film; and
forming a second electrode layer on the plasma doped dielectric film;
wherein said exposing the dielectric film to the at least one plasma reduces a forming voltage needed to generate an electrically conductive path across the plasma doped dielectric film compared to the forming voltage needed to generate an electrically conductive path across the dielectric film.

2. The method of claim 1 , the first electrode layer and the second electrode layer comprise titanium nitride (TiN).

3. The method of claim 1 , wherein the metal oxide comprises hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), titanium oxide (TiO 2 ), nickel oxide (NiO), aluminum oxide (Al 2 O 3 ), or tantalum oxide (Ta 2 O 5 ) and or their mixtures.

4. The method of claim 1 , wherein said exposing the dielectric film to the at least one plasma comprises exposing the dielectric film to a single plasma comprising both hydrogen ions and silicon ions.

5. The method of claim 1 , wherein said exposing the dielectric film to the at least one plasma comprises exposing the dielectric film to a sequence of plasmas, the sequence of plasmas including a first plasma comprising hydrogen ions and a second plasma comprising silicon ions.

6. The method of claim 1 , wherein said exposing the dielectric film to the at least one plasma comprises delivering a hydrogen-containing processing gas and a silicon-containing processing gas to a plasma process chamber in which the substrate is disposed to generate the at least one plasma.

7. The method of claim 6 , wherein the hydrogen-containing processing gas comprises a hydrogen (H 2 ) gas or an H 2 gas combined with one or more inert gases, and wherein the silicon-containing processing gas comprises a perhydridosilane, a hydridohalosilane, a halosilane or an aminosilane.

8. The method of claim 6 , wherein the hydrogen-containing processing gas and the silicon-containing processing gas are delivered to the plasma process chamber at the same time to generate a single plasma containing both hydrogen ions and silicon ions.

9. The method of claim 6 , wherein the hydrogen-containing processing gas and the silicon-containing processing gas are delivered to the plasma process chamber sequentially to generate a sequence of plasmas, and wherein each plasma in the sequence of plasmas contains only one reactive ion species.

10. The method of claim 6 , wherein said exposing the dielectric film to the at least one plasma comprises supplying a bias power to the plasma process chamber to increase an ion content in the plasma doped dielectric film.

11. The method of claim 10 , wherein the bias power is preselected from a range consisting of 50 W to 500 W.

12. The method of claim 11 , wherein said supplying the bias power to the plasma process chamber to increase the ion content in the plasma doped dielectric film further reduces the forming voltage needed to generate the electrically conductive path across the plasma doped dielectric film.

13. The method of claim 6 , wherein said forming the dielectric film and said exposing the dielectric film to the at least one plasma are performed in the same plasma process chamber.

14. A method of forming a resistive random access memory (ReRAM) device, the method comprising:
forming a first electrode layer on a substrate;
depositing a dielectric film on the first electrode layer, wherein the dielectric film comprises a metal oxide;
exposing the dielectric film to one or more plasmas containing hydrogen ions and silicon ions, wherein at least one of the one or more plasmas is generated while supplying a bias power to a plasma process chamber in which the substrate is disposed, and wherein said exposing creates a plasma doped dielectric film by introducing hydrogen and silicon dopants into the dielectric film; and
forming a second electrode layer on the plasma doped dielectric film;
wherein said exposing the dielectric film to the one or more plasmas reduces a forming voltage needed to generate an electrically conductive path across the plasma doped dielectric film compared to the forming voltage needed to generate an electrically conductive path across the dielectric film.

15. The method of claim 14 , wherein the metal oxide comprises hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), titanium oxide (TiO 2 ), nickel oxide (NiO), aluminum oxide (Al 2 O 3 ), or tantalum oxide (Ta 2 O 5 ) or their mixtures.

16. The method of claim 14 , wherein after said exposing the dielectric film to the one or more plasmas and before said forming the second electrode layer on the plasma doped dielectric film, the method further comprises:
depositing an additional dielectric film on the plasma doped dielectric film, wherein the additional dielectric film comprises the metal oxide;
exposing the additional dielectric film to one or more plasmas containing hydrogen ions and silicon ions to introduce hydrogen and silicon dopants into the additional dielectric film; and
repeating said depositing an additional dielectric film and said exposing the additional dielectric film to one or more plasmas until a desired thickness of the plasma doped dielectric film is reached.

17. The method of claim 14 , wherein said exposing the dielectric film to the one or more plasmas comprises delivering a hydrogen-containing processing gas and a silicon-containing processing gas to the plasma process chamber to generate the one or more plasmas.

18. The method of claim 17 , wherein the hydrogen-containing processing gas and the silicon-containing processing gas are delivered to the plasma process chamber at the same time to generate a single plasma containing both the hydrogen ions and the silicon ions.

19. The method of claim 17 , wherein the hydrogen-containing processing gas and the silicon-containing processing gas are delivered to the plasma process chamber sequentially to generate a sequence of plasmas, and wherein each plasma in the sequence of plasmas contains only one reactive ion species.

20. The method of claim 14 , wherein the bias power is preselected from a range consisting of 50 W to 500 W.

21. The method of claim 14 , wherein said supplying the bias power to the plasma process chamber increases an ion content in the plasma doped dielectric film and further reduces the forming voltage needed to generate the electrically conductive path across the plasma doped dielectric film.

Assignees

• Tokyo Electron Ltd
• IBM

Inventors

• Koty Devi
• Yang Qingyun
• Yan Hongwen
• Miyazoe Hiroyuki
• Ando Takashi
• Hopstaken Marinus Johannes Petrus

Classifications

• H10B63/00

  Resistance change memory devices, e.g. resistive RAM [ReRAM] devices · CPC title

• H10N70/041 Primary

  Modification of switching materials after formation, e.g. doping (shaping H10N70/061) · CPC title

• H10N70/021

  Formation of switching materials, e.g. deposition of layers · CPC title

• H10N70/841

  Electrodes · CPC title

• H10N70/8833

  Binary metal oxides, e.g. TaOx · CPC title