Bonding head and method for bonding semiconductor package, and semiconductor package
US-10872875-B2 · Dec 22, 2020 · US
US11837573B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11837573-B2 |
| Application number | US-202117166805-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 3, 2021 |
| Priority date | Jun 19, 2020 |
| Publication date | Dec 5, 2023 |
| Grant date | Dec 5, 2023 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A chip bonding apparatus includes: a bonding contact configured to apply a bonding force to a semiconductor chip disposed on a substrate, the bonding contact having a first surface configured to face the semiconductor chip and a second surface opposite the first surface, the bonding contact including a protruding portion on the first surface, the protruding portion configured to contact the semiconductor chip, the bonding contact including a cavity formed in a region vertically overlapping the protruding portion, a heater disposed to be in contact with the second surface of the bonding contact to cover the cavity, and configured to heat the bonding contact, a bonding head disposed above the heater and configured to transmit the bonding force, and a partition wall structure protruding from a bottom surface of the cavity to partition an inner space of the cavity.
Opening claim text (preview).
What is claimed is: 1. A chip bonding apparatus, comprising: a bonding contact configured to apply a bonding force to a semiconductor chip disposed on a substrate, the bonding contact having a first surface configured to face the semiconductor chip and a second surface opposite the first surface, the bonding contact including a protruding portion on the first surface, the protruding portion configured to contact the semiconductor chip, the bonding contact including a cavity formed in a region vertically overlapping the protruding portion; a heater disposed to be in contact with the second surface of the bonding contact to cover the cavity, and configured to heat the bonding contact; a bonding head disposed above the heater and configured to transmit the bonding force; and a partition wall structure protruding from a bottom surface of the cavity to partition an inner space of the cavity, wherein an upper surface of the partition wall structure is at a lower level than that of the second surface of the bonding contact, wherein the cavity has a depth of 0.5 mm to 1.5 mm, and the partition wall structure is at a level of 0.2 mm to 0.5 mm lower than the second surface of the bonding contact. 2. The chip bonding apparatus of claim 1 , wherein the partition wall structure has a cross or lattice shape, each partition wall of the partition wall structure connecting a pair of sidewalls facing each other. 3. The chip bonding apparatus of claim 1 , wherein the cavity has an area smaller than that of the protruding portion in a plan view. 4. The chip bonding apparatus of claim 1 , wherein the bottom surface of the cavity is formed of any one of a flat surface, an inclined surface, and a concave surface. 5. The chip bonding apparatus of claim 4 , wherein the inclined surface and the concave surface are inclined downwardly in a direction approaching a central region of the bottom surface of the cavity. 6. The chip bonding apparatus of claim 1 , wherein at least one of air, nitrogen gas, and argon gas is filled in the cavity. 7. The chip bonding apparatus of claim 1 , further comprising a through-hole penetrating through the bonding head and the heater and connected to the cavity; and a pressure supply connected to the through-hole, the pressure supply configured to adjust pressure inside the cavity. 8. A chip bonding apparatus, comprising: a bonding tool configured to contact an object to be bonded and having a surface having a first region in which a cavity is formed and a second region disposed at a periphery of the first region; a heater disposed to be in contact with the surface to cover the cavity of the bonding tool and configured to heat the bonding tool; and a partition wall structure protruding from a bottom surface of the cavity to partition an internal space of the cavity into a plurality of regions, the partition wall structure positioned at a lower level than the surface, wherein the cavity is closed from outside by bottom and side portions of a body portion that forms the bonding tool, wherein the bonding tool comprises a protruding portion protruding downwards and configured to contact the object to be bonded, wherein the cavity has a depth of 0.5 mm to 1.5 mm, and wherein the partition wall structure is at a level of 0.2 mm to 0.5 mm lower than the surface of the bonding tool. 9. The chip bonding apparatus of claim 8 , wherein a depth of the cavity is greater than a thickness, in a vertical direction, of an edge of the body portion. 10. The chip bonding apparatus of claim 8 , wherein the partition wall structure is formed in a rotationally symmetrical manner with respect to the center of the cavity. 11. The chip bonding apparatus of claim 1 , wherein a vertical distance between the bottom surface of the protruding portion and the bottom surface of the cavity is less than a vertical distance between the bottom surface of the cavity and the second surface of the bonding contact. 12. The chip bonding apparatus of claim 1 , wherein the cavity has a shape corresponding to a shape of the protruding portion.
Subject matter not provided for in other groups of this subclass · CPC title
Means for cooling · CPC title
Means for applying energy, e.g. ovens or lasers · CPC title
batch processes · CPC title
on active surfaces of flip-chip devices, e.g. underfills · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.