Metallization lines on integrated circuit products

Patent metadata

Field	Value
Publication number	US-11791263-B2
Application number	US-202117553924-A
Country	US
Kind code	B2
Filing date	Dec 17, 2021
Priority date	Oct 4, 2016
Publication date	Oct 17, 2023
Grant date	Oct 17, 2023

Abstract

An integrated circuit product includes a first layer of insulating material including a first insulating material. The first layer of insulating material is positioned above a device layer of a semiconductor substrate. The first layer of insulating material has a lowermost surface positioned above an uppermost surface of a gate of a transistor in a device layer of a semiconductor substrate. The device layer includes transistors. A metallization blocking structure is positioned in an opening in the first layer of insulating material. The metallization blocking structure has a lowermost surface above the uppermost surface of the gate and includes a second insulating material that is different from the first insulating material. The metallization blocking structure includes a second insulating material that is different from the first insulating material. A metallization trench is defined in the first layer of insulating material on opposite sides of the metallization blocking structure. A conductive metallization line includes first and second portions positioned in the metallization trench on opposite sides of the metallization blocking structure. The conductive metallization line has a long axis extending along the first and second portions.

First claim

What is claimed:

1. An integrated circuit product, comprising:
a conductive structure;
a first layer of insulating material including a first insulating material, the first layer of insulating material having a lowermost surface positioned above an uppermost surface of a gate of a transistor in a device layer of a semiconductor substrate;
a metallization blocking structure positioned in an opening in the first layer of insulating material, the metallization blocking structure having a lowermost surface above the uppermost surface of the gate and including a second insulating material that is different from the first insulating material;
a metallization trench defined in the first layer of insulating material on opposite sides of the metallization blocking structure, wherein the metallization trench exposes a portion of the conductive structure; and
a conductive metallization line including a lowermost surface above the uppermost surface of the gate and first and second portions positioned in the metallization trench on opposite sides of the metallization blocking structure, wherein the conductive metallization line has a long axis extending along the first and second portions, wherein a portion of the conductive metallization line is positioned on and in physical contact with the portion of the conductive structure, and wherein the portion of the conductive metallization line is positioned above the conductive structure.

2. The integrated circuit product of claim 1 , wherein the first insulating material and the second insulating material are selectively etchable relative to one another.

3. The integrated circuit product of claim 1 , wherein the first insulating material comprises silicon and oxygen, the second insulating material comprises silicon and nitrogen, the conductive metallization line comprises one of a metal or a metal alloy.

4. The integrated circuit product of claim 1 , wherein the opening extends through an entire vertical thickness of the first layer of insulating material.

5. The integrated circuit product of claim 1 , wherein a first portion of the conductive metallization line physically contacts a portion of a first side of the metallization blocking structure and a second portion of the conductive metallization line physically contacts a second side of the metallization blocking structure that is opposite to the first side of the metallization blocking structure.

6. The integrated circuit product of claim 1 , wherein the second insulating material comprises a material having a k value of less than 7.

7. The integrated circuit product of claim 1 , wherein the metallization blocking structure has a vertical thickness that is less than a vertical thickness of the first layer of insulating material and wherein a bottom surface of the metallization blocking structure is positioned on and in contact with a portion of the first layer of insulating material.

8. The integrated circuit product of claim 1 , wherein the metallization blocking structure has a rectangular configuration when viewed from above.

9. The integrated circuit product of claim 1 , further comprising a second layer of insulating material positioned below the first layer of insulating material, wherein the metallization blocking structure directly contacts the second layer of insulating material.

10. The integrated circuit product of claim 9 , wherein the opening extends vertically into the second layer of insulating material.

11. The integrated circuit product of claim 1 , further comprising a second layer of insulating material positioned below the first layer of insulating material, wherein the second layer of insulating material comprises the first insulating material.

12. The integrated circuit product of claim 11 , wherein the first insulating material comprises silicon and oxygen.

13. The integrated circuit product of claim 11 , wherein the first insulating material comprises a low-k material.

14. The integrated circuit product of claim 1 , further comprising:
a second layer of insulating material positioned below the first layer of insulating material; and
a contact structure embedded in the second layer of insulating material, wherein the conductive metallization line directly contacts the contact structure.

15. The integrated circuit product of claim 1 , wherein the metallization blocking structure has a width greater than a width of the conductive metallization line.

16. The integrated circuit product of claim 1 , wherein the first insulating material has a k value of less than 3.5.

17. The integrated circuit product of claim 15 , wherein the second insulating material comprises a material having a k value of less than 7.

18. The integrated circuit product of claim 1 , wherein the first insulating material comprises silicon and oxygen.

19. The integrated circuit product of claim 1 , wherein the second insulating material comprises silicon and nitrogen.

Assignees

• Globalfoundries Us Inc

Inventors

• Xie Ruilong
• Liebmann Lars
• Chanemougame Daniel
• Han Geng

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10W20/075

  of multilayered thin functional dielectric layers · CPC title

• H10W20/071

  of dielectric parts thereof · CPC title

• H10W20/057

  by selectively depositing, e.g. by using selective CVD or plating · CPC title