Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches
US-9054164-B1 · Jun 9, 2015 · US
US10079173B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10079173-B2 |
| Application number | US-201615285092-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 4, 2016 |
| Priority date | Oct 4, 2016 |
| Publication date | Sep 18, 2018 |
| Grant date | Sep 18, 2018 |
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One illustrative method disclosed includes, among other things, forming a layer of insulating material comprising a first insulating material above a substrate and forming a metallization blocking structure in the layer of insulating material at a location that is in a path of a metallization trench to be formed in the layer of insulating material, the metallization blocking structure comprising a second insulating material that is different from the first insulating material. The method also includes forming the metallization trench in the layer of insulating material on opposite sides of the metallization blocking structure and forming a conductive metallization line in the metallization trench on opposite sides of the metallization blocking structure.
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What is claimed: 1. A method, comprising: forming a layer of insulating material comprising a first insulating material above a semiconductor substrate; removing a first portion of said layer of insulating material to define a recess; forming a metallization blocking structure in said recess at a location that is in a path of a metallization trench to be formed in said layer of insulating material, said metallization blocking structure comprising a second insulating material that is different from said first insulating material; after forming said metallization blocking structure, forming a first patterned etch mask having a trench opening defined therein above said layer of insulating material and removing a second portion of said layer of insulating material through said trench opening to define said metallization trench in said layer of insulating material on opposite sides of said metallization blocking structure; and forming a conductive metallization line in said metallization trench on opposite sides of said metallization blocking structure. 2. The method of claim 1 , wherein said first insulating material and said second insulating material are selectively etchable relative to one another. 3. The method of claim 1 , wherein said first insulating material comprises silicon dioxide, said second insulating material comprises silicon nitride, said conductive metallization line comprises one of a metal or a metal alloy and said conductive metallization line is formed in an M0 level of a metallization system formed above said substrate. 4. The method of claim 1 , wherein forming said metallization trench exposes a contact structure comprising one of a gate contact, a source/drain contact or a conductive via and wherein said conductive metallization line is formed on and in contact with said contact structure. 5. The method of claim 1 , wherein forming said metallization blocking structure in said layer of insulating material comprises: forming a second patterned etch mask above said layer of insulating material; performing an etching process through said second patterned etch mask to form an opening in said layer of insulating material; depositing said second insulating material so as to over-fill said opening; and performing a chemical mechanical polishing process on said second insulating material using said layer of insulating material as a polish-stop layer so as to remove portions of said second insulating material positioned outside of said opening and above an upper surface of said layer of insulating material. 6. The method of claim 5 , wherein said opening is formed such that it extends through an entire vertical thickness of said layer of insulating material. 7. The method of claim 1 , wherein forming said conductive metallization line comprises forming said conductive metallization line in said metallization trench such that a first portion of said conductive metallization line physically contacts a portion of a first side of said metallization blocking structure and a second portion of said conductive metallization line physically contacts a second side of said metallization blocking structure that is opposite to said first side of said metallization blocking structure. 8. The method of claim 1 , wherein said second insulating material comprises a material having a k value of less than 7. 9. A method, comprising: forming a layer of insulating material comprising a first insulating material above a semiconductor substrate; removing a first portion of said layer of insulating material to define a recess; forming a metallization blocking structure in said recess at a location that is in a path of a metallization trench to be formed in said layer of insulating material, said metallization blocking structure comprising a second insulating material having a k value less than 7 and wherein said second insulating material is different from said first insulating material and said first insulating material and said second insulating material are selectively etchable relative to one another; after forming said metallization blocking structure, forming a first patterned etch mask having a trench opening defined therein above said layer of insulating material and removing a second portion of said layer of insulating material through said trench opening to define said metallization trench in said layer of insulating material on opposite sides of said metallization blocking structure; and forming a conductive metallization line in said metallization trench on opposite sides of said metallization blocking structure, wherein said conductive metallization line comprises one of a metal or a metal alloy. 10. The method of claim 9 , wherein said first insulating material comprises silicon dioxide, said second insulating material comprises silicon nitride, and said conductive metallization line is formed in an M0 level of a metallization system formed above said substrate. 11. The method of claim 9 , wherein forming said metallization trench exposes a contact structure comprising one of a gate contact, a source/drain contact or a conductive via and wherein said conductive metallization line is formed on and in contact with said contact structure. 12. The method of claim 9 , wherein forming said metallization blocking structure in said layer of insulating material comprises: forming a second patterned etch mask above said layer of insulating material; performing an etching process through said second patterned etch mask to form an opening in said layer of insulating material; depositing said second insulating material so as to over-fill said opening; and performing a chemical mechanical polishing process on said second insulating material using said layer of insulating material as a polish-stop layer so as to remove portions of said second insulating material positioned outside of said opening and above an upper surface of said layer of insulating material. 13. The method of claim 12 , wherein said opening is formed such that it extends through an entire vertical thickness of said layer of insulating material. 14. The method of claim 9 , wherein forming said conductive metallization line comprises forming said conductive metallization line in said metallization trench such that a first portion of said conductive metallization line physically contacts a portion of a first side of said metallization blocking structure and a second portion of said conductive metallization line physically contacts a second side of said metallization blocking structure that is opposite to said first side of said metallization blocking structure. 15. A method, comprising: forming a conductive structure; forming a layer of insulating material comprising a first insulating material above said conductive structure; removing a first portion of said layer of insulating material to define a recess; forming a metallization blocking structure in said recess at a location that is in a path of a metallization trench to be formed in said layer of insulating material, said metallization blocking structure comprising a second insulating material that is different from said first insulating material; after forming said metallization blocking structure, removing a second portion of said layer of insulating material to define said metallization trench in said layer of insulating material on opposite sides of said metallization blocking structure, said metallization trench exposing at least a portion of said conductive structure; and forming a conductive metallization line in said metallization trench on opposite sides of said metallization block
the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title
the material being a silicon oxide, e.g. SiO2 · CPC title
of multilayered thin functional dielectric layers · CPC title
of dielectric parts thereof · CPC title
by selectively depositing, e.g. by using selective CVD or plating · CPC title
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