Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches
US-9054164-B1 · Jun 9, 2015 · US
US11233006B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11233006-B2 |
| Application number | US-201816103372-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 14, 2018 |
| Priority date | Oct 4, 2016 |
| Publication date | Jan 25, 2022 |
| Grant date | Jan 25, 2022 |
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An integrated circuit product includes a first layer of insulating material including a first insulating material. The first layer of insulating material is positioned above a device layer of a semiconductor substrate. The device layer includes transistors. A metallization blocking structure is positioned in an opening in the first layer of insulating material. The metallization blocking structure includes a second insulating material that is different from the first insulating material. A metallization trench is defined in the first layer of insulating material on opposite sides of the metallization blocking structure. A conductive metallization line includes first and second portions positioned in the metallization trench on opposite sides of the metallization blocking structure. The conductive metallization line has a long axis extending along the first and second portions.
Opening claim text (preview).
What is claimed: 1. An integrated circuit product, comprising: a first layer of insulating material including a first insulating material, the first layer of insulating material having a lowermost surface positioned above an uppermost surface of a gate of a transistor in a device layer of a semiconductor substrate; a metallization blocking structure positioned in an opening in the first layer of insulating material, the metallization blocking structure having a lowermost surface above the uppermost surface of the gate and including a second insulating material that is different from the first insulating material; a metallization trench defined in the first layer of insulating material on opposite sides of the metallization blocking structure; and a conductive metallization line including a lowermost surface above the uppermost surface of the gate and first and second portions positioned in the metallization trench on opposite sides of the metallization blocking structure, wherein the conductive metallization line has a long axis extending along the first and second portions and a first width in a direction perpendicular to the long axis, wherein the metallization blocking structure has a second width in the direction perpendicular to the long axis greater than the first width. 2. The product of claim 1 , wherein the conductive metallization line conductively contacts a contact structure comprising one of a gate contact, a source/drain contact or a conductive via positioned in a second layer of insulating material positioned below the first layer of insulating material. 3. The product of claim 1 , wherein the opening extends through an entire vertical thickness of the first layer of insulating material. 4. The product of claim 1 , wherein the first portion of the conductive metallization line physically contacts a portion of a first side of the metallization blocking structure and the second portion of the conductive metallization line physically contacts a second side of the metallization blocking structure that is opposite to the first side of the metallization blocking structure. 5. The product of claim 1 , wherein the metallization blocking structure has a vertical thickness that is less than a vertical thickness of the first layer of insulating material and wherein a bottom surface of the metallization blocking structure is positioned on and in contact with a portion of the first layer of insulating material. 6. The product of claim 1 , wherein the metallization blocking structure has a rectangular configuration when viewed from above. 7. The product of claim 5 , further comprising a second layer of insulating material positioned below the first layer of insulating material, wherein the metallization blocking structure abuts the second layer of insulating material. 8. The product of claim 7 , wherein the opening extends vertically into the second layer of insulating material. 9. The product of claim 1 , further comprising a second layer of insulating material positioned below the first layer of insulating material, wherein the second layer of insulating material comprises the first insulating material. 10. The product of claim 9 , wherein the first insulating material comprises silicon and oxygen. 11. The product of claim 1 , further comprising: a second layer of insulating material positioned below the first layer of insulating material; and a contact structure embedded in the second layer of insulating material, wherein the conductive metallization line abuts the contact structure. 12. The product of claim 1 , wherein the first insulating material has a k value of less than 3.5, wherein the second insulating material comprises a material having a k value of less than 7. 13. The product of claim 1 , wherein the first insulating material comprises a material having a first k value, and the second insulating material comprises a material having a second k value greater than the first k value. 14. An integrated circuit product, comprising: a first layer of insulating material including a first insulating material, the first layer of insulating material having a lowermost surface positioned above an uppermost surface of a gate of a transistor in a device layer of a semiconductor substrate; a metallization blocking structure positioned in an opening in the first layer of insulating material, the metallization blocking structure having a lowermost surface above the uppermost surface of the gate and a second insulating material that is different from the first insulating material; a metallization trench defined in the first layer of insulating material on opposite sides of the metallization blocking structure; and a conductive metallization line including a lowermost surface above the uppermost surface of the gate and first and second portions positioned in the metallization trench on opposite sides of the metallization blocking structure, wherein the metallization blocking structure has a vertical thickness that is less than a vertical thickness of the first layer of insulating material and wherein a bottom surface of the metallization blocking structure is positioned on and in contact with a portion of the first layer of insulating material. 15. The integrated circuit product of claim 14 , wherein the first portion of the conductive metallization line physically contacts a first portion of a first side of the metallization blocking structure and wherein the second portion of the conductive metallization line physically contacts a first portion of a second side of the metallization blocking structure, wherein the first side is opposite the second side. 16. The integrated circuit product of claim 15 , wherein the first layer of insulating material physically contacts a second portion of the first side of the metallization blocking structure and physically contacts a second portion of the second side of the metallization blocking structure. 17. The integrated circuit product of claim 16 , wherein along the long axis, the first layer of insulating material physically separates the first portion of the conductive metallization line from the metallization blocking structure and physically separates the second portion of the conductive metallization line from the metallization blocking structure except at the first portion of the first side of the metallization blocking structure and the first portion of the second side of the metallization blocking structure. 18. The integrated circuit product of claim 16 , wherein the first portion of the first side of the metallization blocking structure and the first portion of the second side of the metallization blocking structure are located proximate an upper surface of the metallization blocking structure. 19. An integrated circuit product, comprising: a first layer of insulating material comprising a first insulating material positioned above a device layer of a semiconductor substrate, the device layer comprising transistors; a metallization blocking structure positioned in an opening in the first layer of insulating material, the metallization blocking structure comprising a second insulating material that is different from the first insulating material; a metallization trench defined in the first layer of insulating material on opposite sides of the metallization blocking structure; and a conductive metallization line comprising first and second portions positioned in the metallization trench on opposite sides of the metallization blocking structure, wherein the conductive metallization line has
the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title
the material being a silicon oxide, e.g. SiO2 · CPC title
of multilayered thin functional dielectric layers · CPC title
of dielectric parts thereof · CPC title
by selectively depositing, e.g. by using selective CVD or plating · CPC title
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