Corrosion tolerant micro-electromechanical fluid ejection device

Patent metadata

Field	Value
Publication number	US-11787180-B2
Application number	US-201917414140-A
Country	US
Kind code	B2
Filing date	Apr 29, 2019
Priority date	Apr 29, 2019
Publication date	Oct 17, 2023
Grant date	Oct 17, 2023

Abstract

A microfluidic device including a fluid ejection channel defined by a fluid barrier and an orifice, or nozzle, for containing and/or passing fluids, and further including micro-electromechanical systems (MEMS) and/or electronic circuitry may be fabricated on a silicon substrate and included in a fluid ejection system. Various microfabrication techniques used for fabricating semiconductor devices may be used to manufacture such microfluidic devices.

First claim

What is claimed is:

1. An apparatus comprising:
a circuit region with logical circuits thereon and including a doped dielectric film, the circuit region including:
a thermal oxide layer on a silicon substrate;
a dielectric layer over the thermal oxide layer, the dielectric layer including the doped dielectric film; and

a fluidic region including a fluid port formed through a surface of the apparatus, the fluidic region including:
an aperture in the dielectric layer, wherein the aperture is defined by a dielectric wall which forms part of the dielectric layer; and
a sealing film over the dielectric wall that prevents the doped dielectric film from contacting fluid contained in the fluid port.

2. The apparatus of claim 1 , wherein the sealing film includes an un-doped dielectric film over the dielectric wall.

3. The apparatus of claim 1 , wherein the sealing film is an electrically insulating and corrosion resistant barrier to the doped dielectric film.

4. The apparatus of claim 1 , wherein a portion of the aperture terminates at a termination point in the thermal oxide layer.

5. The apparatus of claim 1 , wherein a portion of the aperture terminates at a termination point in the substrate.

6. The apparatus of claim 1 , wherein a portion of the aperture terminates at the thermal oxide layer.

7. The apparatus of claim 1 , wherein a portion of the aperture terminates at the silicon substrate.

8. An apparatus to receive a fluid having corrosive attributes, the apparatus comprising:
a first region including logic circuits thereon, the first region including:
a thermal oxide layer on a substrate;
a doped dielectric film over the thermal oxide layer; and

a second region including:
a fluid port to receive the fluid and defined by an aperture, the aperture including a selectively removed portion of the doped dielectric film, wherein the aperture is defined by a wall of the doped dielectric film; and
an un-doped dielectric film over the wall of the doped dielectric film, wherein the un-doped dielectric film protects the doped dielectric film from corrosive attributes of the fluid.

9. The apparatus of claim 8 , wherein the first region is on a same substrate as the second region.

10. The apparatus of claim 8 , wherein the first region is within a threshold distance of the second region.

11. The apparatus of claim 8 , wherein the first region is adjacent the first region on a horizontal plane.

12. An apparatus, comprising:
a monolithic integrated circuit with logical circuits thereon and including a doped dielectric film, including:
a field oxide layer over a substrate;
the doped dielectric film over the field oxide layer; and
a metal layer over the doped dielectric film; and

a microfluidic device, collocated on the apparatus with the monolithic integrated circuit, the microfluidic device including:
an aperture disposed in a region of the microfluidic device to eject fluid, wherein the aperture is defined by a wall of the doped dielectric film; and
an un-doped dielectric film over the wall of the doped dielectric film to protect the doped dielectric film of the monolithic integrated circuit from corrosive attributes of the fluid.

13. The apparatus of claim 12 , wherein the microfluidic device and the monolithic integrated circuit are on a same silicon substrate.

14. The apparatus of claim 12 , wherein the monolithic integrated circuit includes a polysilicon layer over the field oxide layer and before the doped dielectric film.

15. The apparatus of claim 12 , wherein an intermediate product of the apparatus includes the monolithic integrated circuit having a polysilicon layer over the field oxide and before the doped dielectric film, the polysilicon layer including an overlay region of polysilicon extending beyond the wall of the doped dielectric film.

Assignees

• Hewlett Packard Development Co

Inventors

• Wang Stanley J
• Fuller Anthony M

Classifications

• B41J2/1433 Primary

  Structure of nozzle plates · CPC title

• B01L3/502715 Primary

  characterised by interfacing components, e.g. fluidic, electrical, optical or mechanical interfaces · CPC title

• B81B7/0025

  Protection against chemical alteration · CPC title

• B01L2200/12

  Specific details about manufacturing devices · CPC title

• B81B2201/052

  Ink-jet print cartridges · CPC title