Semiconductor device

US11764074B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11764074-B2
Application numberUS-202017011019-A
CountryUS
Kind codeB2
Filing dateSep 3, 2020
Priority dateOct 10, 2013
Publication dateSep 19, 2023
Grant dateSep 19, 2023

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display device comprising: a pixel over a substrate, the pixel comprising: a light-emitting element; a capacitor; a first transistor; a second transistor; a third transistor; and a fourth transistor; wherein the first transistor comprises a first channel formation region, wherein a first conductor and a second conductor are sandwiching the first channel formation region, wherein the first conductor is a gate of the first transistor, wherein the first transistor is a driving transistor, wherein the second transistor is a single gate transistor, wherein the second conductor is not directly connected to the first conductor, wherein the third transistor is a dual gate transistor, wherein the first conductor is electrically connected to one of a source electrode and a drain electrode of the third transistor, wherein the one of the source electrode and the drain electrode of the third transistor is electrically connected to one of a source electrode and a drain electrode of the fourth transistor, wherein one terminal of the capacitor is electrically connected to the first conductor, wherein the other terminal of the capacitor is electrically connected to a power supply line, and wherein the light-emitting element is electrically connected to the power supply line through the first transistor and the second transistor. 2. The display device according to claim 1 , wherein the light-emitting element is an organic EL element. 3. The display device according to claim 1 , wherein the first conductor is electrically connected to a gate of the second transistor. 4. The display device according to claim 1 , wherein the first transistor is a dual gate transistor. 5. A display device comprising: a pixel over a substrate, the pixel comprising: a light-emitting element; a capacitor; a first transistor; a second transistor; a third transistor; and a fourth transistor, wherein the first transistor comprises a first channel formation region, wherein a first conductor and a second conductor overlap with each other with the first channel formation region interposed therebetween, wherein the first conductor is a gate of the first transistor, wherein the first transistor is a driving transistor, wherein the second transistor is a single gate transistor, wherein the second conductor is not directly connected to the first conductor, wherein the third transistor is a dual gate transistor, wherein the first conductor is electrically connected to one of a source electrode and a drain electrode of the third transistor, wherein the one of the source electrode and the drain electrode of the third transistor is electrically connected to one of a source electrode and a drain electrode of the fourth transistor, wherein each of the third transistor and the fourth transistor comprises an oxide semiconductor, wherein one terminal of the capacitor is electrically connected to the first conductor, wherein the other terminal of the capacitor is electrically connected to a power supply line, and wherein the light-emitting element is electrically connected to the power supply line through the first transistor and the second transistor. 6. The display device according to claim 5 , wherein the light-emitting element is an organic EL element. 7. The display device according to claim 5 , wherein the first conductor is electrically connected to a gate of the second transistor. 8. The display device according to claim 5 , wherein the first transistor is a dual gate transistor. 9. The display device according to claim 1 , wherein at least one of a gate insulating layer and a protective layer of the third transistor includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of nitrogen oxide released by the heat treatment. 10. The display device according to claim 5 , wherein at least one of a gate insulating layer and a protective layer of the third transistor includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of nitrogen oxide released by the heat treatment.

Assignees

Inventors

Classifications

  • Oxides · CPC title

  • Organic materials, e.g. photoresists · CPC title

  • of electrodes ohmically coupled to a semiconductor · CPC title

  • H10P95/90Primary

    Thermal treatments, e.g. annealing or sintering · CPC title

  • being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874) · CPC title

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Frequently asked questions

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What does patent US11764074B2 cover?
To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and …
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10P95/90. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 19 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).