Display panel and display device

Patent metadata

Field	Value
Publication number	US-11740523-B2
Application number	US-202117772674-A
Country	US
Kind code	B2
Filing date	Jun 8, 2021
Priority date	Jul 17, 2020
Publication date	Aug 29, 2023
Grant date	Aug 29, 2023

Abstract

A display panel and a display device are provided. The display panel includes a first substrate and a second substrate arranged oppositely. The first substrate includes a spacer. The second substrate includes: a second base substrate; a data line including, a body portion and a bending portion; and a sub-pixel including a light transmission region. An orthographic projection of the spacer on the second base substrate is adjacent to that of the light transmission region on the second base substrate, the orthographic projection of the spacer on the second base substrate is spaced apart from that of the data line on the second base substrate; an orthographic projection of the bending portion on the second base substrate is bent toward a direction away from the orthographic projection of the spacer on the second base substrate with respect to an orthographic projection of the body portion on the second base substrate.

First claim

What is claimed is:

1. A display panel, comprising:
a first substrate, comprising:
a first base substrate; and
a plurality of spacers arranged on the first base substrate; and

a second substrate arranged opposite to the first substrate, comprising:
a second base substrate;
a plurality of gate lines and a plurality of data lines arranged on the second base substrate, wherein each of the plurality of gate lines is arranged in a row direction, and each of the plurality of data lines is arranged in a column direction;
a plurality of sub-pixels arranged on the second base substrate in an array in the row direction and the column direction, wherein the plurality of gate lines and the plurality of data lines intersect to define the plurality of sub-pixels, and each of the plurality of sub-pixels comprises a light transmission region; and

a second data line arranged adjacent to the first sub-pixel,
wherein the plurality of spacers comprise at least one first spacer, the plurality of data lines comprise at least a first data line, the plurality of sub-pixels comprise a first sub-pixel, and the first data line is arranged adjacent to the first sub-pixel;
wherein an orthographic projection of the first spacer on the second base substrate is adjacent to an orthographic projection of the light transmission region of the first sub-pixel on the second base substrate, and the orthographic projection of the first spacer on the second base substrate is spaced apart from an orthographic projection of the first data line on the second base substrate;
wherein the first data line comprises a body portion and a bending portion, and an orthographic projection of the bending portion on the second base substrate is bent toward a direction away from the orthographic projection of the first spacer on the second base substrate with respect to an orthographic projection of the body portion on the second base substrate;
wherein an orthographic projection of the first data line on the second base substrate and an orthographic projection of the second data line on the second base substrate are respectively located on both sides of the orthographic projection of the first spacer on the second base substrate in the row direction, and a distance between the orthographic projection of the second data line on the second base substrate and the orthographic projection of the first spacer on the second base substrate in the row direction is greater than a distance between the orthographic projection of the first data line on the second base substrate and the orthographic projection of the first spacer on the second base substrate in the row direction;
wherein the second data line comprises a body portion and a bending portion, a projection of the bending portion of the second data line in the row direction at least partially overlaps a projection of the first spacer in the row direction, and an orthographic projection of the bending portion of the second data line on the second base substrate is bent toward a direction away from the orthographic projection of the first spacer on the second base substrate with respect to the orthographic projection of the body portion of the second data line on the second base substrate;
wherein the plurality of gate lines comprise a first gate line arranged adjacent to the first sub-pixel, and the orthographic projection of the first spacer on the second base substrate falls within an orthographic projection of the first gate line on the second base substrate,
wherein the first gate line comprises a first widened portion and a second widened portion, an orthographic projection of the first widened portion and the second widened portion on the second base substrate is located between the orthographic projection of the first data line on the second base substrate and the orthographic projection of the second data line on the second base substrate; and
wherein the second substrate further comprises a plurality of common electrode lines arranged on the second base substrate, and each of the plurality of common electrode lines is arranged in the row direction,
wherein the plurality of common electrode lines comprise a first common electrode line, an orthographic projection of the first common electrode line on the second base substrate is adjacent to the orthographic projection of the first gate line on the second base substrate, the first common electrode line comprises a body portion and a bending portion, a projection of the bending portion of the first common electrode line in the column direction at least partially overlaps a projection of the first widened portion in the column direction, and an orthographic projection of the bending portion of the first common electrode line on the second base substrate is bent toward a direction away from the orthographic projection of the first widened portion on the second base substrate with respect to the orthographic projection of the body portion of the first common electrode line on the second base substrate.

2. The display panel of claim 1 , wherein the bending portion comprises a bending body portion and two bending connection portions, an arrangement direction of the bending body portion is parallel to an arrangement direction of the body portion of the first data line, one end of the bending body portion is connected to one section of the body portion of the first data line through one of the bending connection portions, and the other end of the bending body portion is connected to the other section of the body portion of the first data line through the other of the bending connection portions.

3. The display panel of claim 1 , wherein the bending portion of the second data line comprises a bending body portion and two bending connection portions, an arrangement direction of the bending body portion of the second data line is parallel to an arrangement direction of the body portion of the second data line, one end of the bending body portion of the second data line is connected to one section of the body portion of the second data line through one of the bending connection portions of the second data line, and the other end of the bending body portion of the second data line is connected to the other section of the body portion of the second data line through the other of the bending connection portions of the second data line.

4. The display panel of claim 1 , wherein a size of each of the first widened portion and the second widened portion in the column direction is greater than a size of a remaining portion of the first gate line in the column direction, and the orthographic projection of the first spacer on the second base substrate falls within an orthographic projection of the first widened portion of the first gate line on the second base substrate.

5. The display panel of claim 4 , wherein the second substrate further comprises a plurality of thin film transistors arranged on the second base substrate, and the plurality of thin film transistors comprise at least one first thin film transistor arranged adjacent to the first sub-pixel; and
wherein an orthographic projection of the first thin film transistor on the second base substrate falls within an orthographic projection of the second widened portion of the first gate line on the second base substrate.

6. The display panel of claim 5 , wherein the orthographic projection of the first thin film transistor on the second base substrate is located between the orthographic projection of the first spacer on the second base substrate and the orthographic projection of the bending portion of the second data line on the second base substrate.

7. The display panel of claim 5 , wherein the first gate line further comprises a plurality of inclined portions, and an arrangement direct

Assignees

• Hefei Boe Display Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Zhang Chunxu
• Zhang Yuntian
• Jiang Xiaoting
• Yang Haipeng
• Dai Ke

Classifications

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/13394 Primary

  spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title