Array substrate, display panel and display device

Patent metadata

Field	Value
Publication number	US-10429708-B2
Application number	US-201815939020-A
Country	US
Kind code	B2
Filing date	Mar 28, 2018
Priority date	Aug 1, 2017
Publication date	Oct 1, 2019
Grant date	Oct 1, 2019

Abstract

An array substrate includes a first base substrate, and gate lines and data lines arranged on the first base substrate. The gate lines and the data lines crosswise define pixel regions, wherein the pixel regions include light transmission areas one-to-one. The array substrate further includes a first raised structure arranged between a main spacer initial contact area and one of the light transmission areas, wherein the first raised structure is configured to provide a blocking function to a movement of a main spacer.

First claim

What is claimed is:

1. An array substrate, comprising:
a first base substrate;
gate lines and data lines arranged on the first base substrate, wherein the gate lines and the data lines crosswise define pixel regions, the gate lines arranged between adjacent ones of the pixel region are in pair, and the pixel regions comprise light transmission areas wherein one pixel region comprises one light transmission area; and
a first raised structure arranged between a main spacer initial contact area and one of the light transmission areas, wherein the first raised structure is configured to provide a block function to a movement of a main spacer.

2. The array substrate according to claim 1 , wherein a first distance between a side of the main spacer initial contact area close to the first raised structure and a side of the first raised structure away from the main spacer initial contact area, is larger than a difference between a maximum moving distance of the main spacer and a half of a length of the main spacer in a direction along the data lines.

3. The array substrate according to claim 1 , wherein a thickness of the first raised structure is increased from an edge to a center.

4. The array substrate according to claim 3 , wherein a side of the first raised structure close to the main spacer initial contact area is in a stepped structure.

5. The array substrate according to claim 1 , wherein the first raised structure comprises a first pattern layer and a second pattern layer;
the first pattern layer and the gate lines are arranged in a same layer; and the second pattern layer and the data lines are arranged in a same layer.

6. The array substrate according to claim 1 , wherein the main spacer initial contact area is located on one of the regions which are respectively next to the pixel regions in blue and are provided with some of the gate lines.

7. The array substrate according to claim 1 , further comprising a second raised structure arranged between an auxiliary spacer initial projection area and one of the light transmission areas, and the second raised structure is configured to provide a blocking function to a movement of an auxiliary spacer.

8. The array substrate according to claim 7 , wherein a second distance between a side of the auxiliary spacer initial projection area close to the second raised structure and a side of the second raised structure away from the auxiliary spacer initial projection area, is larger than a difference between a maximum moving distance of the auxiliary spacer and a half of a length of the auxiliary spacer in the direction along the data lines.

9. The array substrate according to claim 7 , wherein a thickness of the second raised structure is increased from an edge to a center.

10. The array substrate according to claim 9 , wherein a side of the second raised structure close to the auxiliary spacer initial projection area is in a stepped structure.

11. The array substrate according to claim 7 , wherein the second raised structure comprises a third pattern layer and a fourth pattern layer;
the third pattern layer and the gate lines are arranged in a same layer; and the fourth pattern layer and the data lines are arranged in a same layer.

12. A display panel, comprising the array substrate according to claim 1 and an alignment substrate, wherein
the alignment substrate comprises a second base substrate and a main spacer arranged on the second base substrate; and
the main spacer is in contact with the main spacer initial contact area when there has been no force acted on the display panel.

13. The display panel according to claim 12 , wherein:
the alignment substrate further comprises an auxiliary spacer arranged on the second base substrate,
the array substrate further comprises a second raised structure arranged between an auxiliary spacer initial projection area and one of the light transmission areas, and the second raised structure is configured to provide a blocking function to a movement of the auxiliary spacer.

14. The display panel according to claim 12 , wherein, the alignment substrate further comprises a black matrix arranged on the second base substrate; and the light transmission areas on the array substrate are outside a shielding provided by the black matrix.

15. A display device, comprising the display panel according to claim 12 .

Assignees

• Boe Technology Group Co Ltd

Inventors

• Liu Liwei
• Im Yunsik

Classifications

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/1339

  Gaskets; Spacers; Sealing of cells · CPC title

• G02F1/133512

  Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

• G02F1/1333 Primary

  Constructional arrangements; {Manufacturing methods}(G02F1/135, G02F1/136 take precedence) · CPC title

• G02F1/13394

  spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title