Radio-frequency loss reduction in photonic circuits

Patent metadata

Field	Value
Publication number	US-11668994-B2
Application number	US-202117203310-A
Country	US
Kind code	B2
Filing date	Mar 16, 2021
Priority date	Apr 16, 2015
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

In photonic integrated circuits implemented in silicon-on-insulator substrates, non-conductive channels formed, in accordance with various embodiments, in the silicon device layer and/or the silicon handle of the substrate in regions underneath radio-frequency transmission lines of photonic devices can provide breaks in parasitic conductive layers of the substrate, thereby reducing radio-frequency substrate losses.

First claim

The invention claimed is:

1. A photonic integrated circuit (PIC) comprising:
a silicon-on-insulator substrate comprising a silicon handle, a buried oxide layer disposed on top of the silicon handle, and a silicon device layer disposed on top of the buried oxide layer;
a cladding layer disposed on top of the silicon device layer;
a waveguide formed within at least one of the silicon device layer or the cladding layer;
a transmission line comprising a pair of electrodes disposed on top of the cladding layer, the electrodes running parallel to the waveguide on both sides of the waveguide; and
one or more nonconductive channels formed underneath the transmission line within at least one of the silicon device layer or the silicon handle and extending to the buried oxide layer, each of the one or more nonconductive channels running parallel to the waveguide and overlapping laterally with a gap between the electrodes but not extending beyond outer edges of the electrodes.

2. The PIC of claim 1 , wherein the waveguide comprises a rib waveguide formed in the silicon device layer.

3. The PIC of claim 1 , wherein the waveguide comprises a III-V waveguide embedded in the cladding layer.

4. The PIC of claim 1 , wherein the waveguide comprises a rib waveguide formed in the silicon device layer and a III-V waveguide, embedded in the cladding layer, above the rib waveguide.

5. The PIC of claim 1 , wherein the one or more nonconductive channels do not laterally overlap with the electrodes.

6. The PIC of claim 1 , wherein the one or more nonconductive channels comprise one or more channels in the silicon device layer.

7. The PIC of claim 6 , wherein the one or more channels in the silicon device layer comprise multiple channels formed underneath the gap.

8. The PIC of claim 1 , wherein the one or more nonconductive channels comprise one or more channels in the silicon handle.

9. The PIC of claim 1 , wherein the one or more nonconductive channels are filled with a nonconductive polymer or a dielectric material.

10. The PIC of claim 1 , wherein the waveguide forms a first interferometric waveguide arm of a Mach-Zehnder modulator, the PIC further comprising a second interferometric waveguide arm of the Mach-Zehnder modulator.

11. The PIC of claim 10 , wherein the first and second interferometric waveguide arms are both located laterally between the pair of electrodes of the transmission line.

12. The PIC of claim 11 , wherein the first interferometric waveguide arm is electrically connected to a first electrode of the pair of electrodes and the second interferometric waveguide arm is electrically connected to a second electrode of the pair of electrodes.

13. The PIC of claim 12 , wherein the one or more nonconductive channels comprise one or more channels between the first and second interferometric waveguide arms.

14. The PIC of claim 12 , wherein the one or more nonconductive channels comprise channels on both sides of an optical waveguide structure branching out into the first and second interferometric waveguide arms.

15. The PIC of claim 10 , wherein the pair of electrodes comprises a signal electrode and a first ground electrode, the transmission line further comprising a second ground electrode, the signal electrode running between the first and second interferometric waveguide arms, and the first and second ground electrodes running on both sides of an optical waveguide structure branching out into the first and second interferometric waveguide arms.

16. The PIC of claim 15 , wherein the signal electrode is a first signal electrode, and wherein the transmission line further comprises a second signal electrode running between the first and second interferometric waveguide arms.

17. The PIC of claim 16 , wherein the transmission line further comprises a third ground electrode running between the first and second signal electrodes.

18. The PIC of claim 15 , further comprising one or more nonconductive channels formed within the silicon device layer and overlapping laterally with a gap between the signal electrode and the second ground electrode.

19. The PIC of claim 1 , wherein the waveguide and the transmission line are configured as a traveling-wave photodetector.

20. The PIC of claim 19 , wherein the waveguide comprises a structure bonded to the substrate and comprising a photoabsorption region, the III-V structure receiving an optical input from a waveguide in the silicon device layer.

Assignees

• Aurrion Inc
• Openlight Photonics Inc

Inventors

• Parker John
• Fish Gregory Alan
• Koch Brian R

Classifications

• G02F1/2257

  the optical waveguides being made of semiconducting material · CPC title

• G02F1/2255 Primary

  controlled by a high-frequency electromagnetic component in an electric waveguide structure · CPC title

• H01P3/026

  Coplanar striplines [CPS] · CPC title

• H10F71/127

  The active layers comprising only Group III-V materials, e.g. GaAs or InP · CPC title

• H10F39/806

  Optical elements or arrangements associated with the image sensors · CPC title