Methods of forming three-dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates
US-9293448-B2 · Mar 22, 2016 · US
US9804475B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9804475-B1 |
| Application number | US-201615130156-A |
| Country | US |
| Kind code | B1 |
| Filing date | Apr 15, 2016 |
| Priority date | Apr 16, 2015 |
| Publication date | Oct 31, 2017 |
| Grant date | Oct 31, 2017 |
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In photonic integrated circuits implemented in silicon-on-insulator substrates, non-conductive channels formed, in accordance with various embodiments, in the silicon device layer and/or the silicon handle of the substrate in regions underneath radio-frequency transmission lines of photonic devices can provide breaks in parasitic conductive layers of the substrate, thereby reducing radio-frequency substrate losses.
Opening claim text (preview).
The invention claimed is: 1. A photonic integrated circuit (PIC) comprising: a silicon-on-insulator substrate comprising a silicon handle, a buried oxide layer disposed on top of the silicon handle, a silicon device layer disposed on top of the buried oxide layer, and a cladding layer disposed on top of the silicon device layer; a first photonic device comprising a device structure made of a material embedded within the cladding layer and a transmission line having two or more electrodes disposed on top of the cladding layer, the two or more electrodes defining one or more gaps between the electrodes; one or more second photonic devices formed partially within at least one of the silicon device layer or the cladding layer; and formed within at least one of the silicon handle or the silicon device layer in a region underneath the transmission line, one or more nonconductive channels each laterally overlapping with one of the one or more gaps and not extending beyond outer edges of the electrodes defining the respective gap. 2. The PIC of claim 1 , wherein the first photonic device is a Mach-Zehnder modulator comprising two waveguide interferometer arms formed of the material. 3. The PIC of claim 1 , wherein the one or more channels underneath the one or more gaps do not laterally overlap with the electrodes defining the respective gaps. 4. The PIC of claim 1 , wherein at least one of the nonconductive channels is formed within the silicon device layer. 5. The PIC of claim 1 , wherein at least one of the nonconductive channels is formed within the silicon handle.
the optical waveguides being made of semiconducting material · CPC title
controlled by a high-frequency electromagnetic component in an electric waveguide structure · CPC title
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The active layers comprising only Group III-V materials, e.g. GaAs or InP · CPC title
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