Methods for resistive RAM (ReRAM) performance stabilization via dry etch clean treatment

Patent metadata

Field	Value
Publication number	US-11637242-B2
Application number	US-202016999441-A
Country	US
Kind code	B2
Filing date	Aug 21, 2020
Priority date	Aug 21, 2020
Publication date	Apr 25, 2023
Grant date	Apr 25, 2023

Abstract

The performance of a ReRAM structure may be stabilized by utilizing a dry chemical gas removal (or cleaning) process to remove sidewall residue and/or etch by-products after etching the ReRAM stack layers. The dry chemical gas removal process decreases undesirable changes in the ReRAM forming voltage that may result from such sidewall residue and/or etch by-products. Specifically, the dry chemical gas removal process may reduce the ReRAM forming voltage that may otherwise result in a ReRAM structure that has the sidewall residue and/or etch by-products. In one embodiment, the dry chemical gas removal process may comprise utilizing a combination of HF and NH3 gases. The dry chemical gas removal process utilizing HF and NH3 gases may be particularly suited for removing halogen containing sidewall residue and/or etch by-products.

First claim

What is claimed is:

1. A method of processing a resistive random-access memory (ReRAM) device, comprising:
patterning a multi-layer ReRAM stack on a substrate, wherein a sidewall material is formed on sidewalls of the multi-layer ReRAM stack, the sidewall material containing chlorine introduced by the patterning process; and
removing the sidewall material from the sidewalls of the multi-layer ReRAM stack through the use of a dry chemical gas removal process, the dry chemical gas including at least one of HF gas or NH 3 gas.

2. The method of claim 1 , wherein the dry chemical gas removal process comprises using HF gas and NH 3 gas.

3. The method of claim 1 , wherein the patterning the multi-layer ReRAM stack on the substrate comprises etching at least part of the multi-layer ReRAM stack with a halogen containing plasma etch.

4. A method of processing a resistive random access memory (ReRAM) device, comprising:
patterning a multi-layer ReRAM stack on a substrate, wherein a sidewall material is formed on sidewalls of the multi-layer stack, the sidewall material comprising at least a halogen introduced by the patterning process; and
removing the sidewall material from the sidewalls of the multi-layer ReRAM stack using a dry chemical gas removal process, the dry chemical gas including at least one of an HF gas or a NH 3 gas.

5. The method of claim 4 , wherein the removing the sidewall material from the sidewalls of the multi-layer ReRAM stack improves a forming voltage of the ReRAM device.

6. The method of claim 5 , wherein the removing the sidewall material from the sidewalls of the multi-layer ReRAM stack decreases the forming voltage of the ReRAM device by 10% or more as compared to not removing the sidewall material from the sidewalls of the multi-layer ReRAM stack.

7. The method of claim 4 , wherein the halogen comprises chlorine.

8. The method of claim 7 , wherein the multi-layer ReRAM stack includes a resistive switching layer comprising hafnium oxide, tantalum oxide, aluminum oxide, zirconium oxide, or titanium oxide.

9. The method of claim 8 , wherein the removing the sidewall material from the sidewalls of the multi-layer ReRAM stack limits chlorine contamination of the resistive switching layer.

10. The method of claim 9 , wherein the removing the sidewall material from the sidewalls of the multi-layer ReRAM stack decreases a forming voltage of the ReRAM device by 10% or more as compared to not removing the sidewall material from the sidewalls of the multi-layer ReRAM stack.

Assignees

• Tokyo Electron Ltd
• Suny Polytechnic Inst College Of Nanoscience And Engineering

Inventors

• Voronin Sergey
• Wang Qi
• Sridhar Shyam
• Beckmann Karsten
• Rodgers Martin
• Cady Nathaniel

Classifications

• H10N70/063 Primary

  by etching of pre-deposited switching material layers, e.g. lithography · CPC title

• G11C13/0069

  Writing or programming circuits or methods · CPC title

• G11C13/0007

  comprising metal oxide memory material, e.g. perovskites · CPC title

• H10N70/20 Primary

  Multistable switching devices, e.g. memristors · CPC title

• G11C2013/0083

  Write to perform initialising, forming process, electro forming or conditioning · CPC title