Dual wafer plating fixture for a continuous plating line

Patent metadata

Field	Value
Publication number	US-11598018-B2
Application number	US-201916295995-A
Country	US
Kind code	B2
Filing date	Mar 7, 2019
Priority date	Mar 30, 2018
Publication date	Mar 7, 2023
Grant date	Mar 7, 2023

Abstract

A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.

First claim

What is claimed is:

1. A wafer plating fixture for use in simultaneously electroplating two substrates, the wafer plating fixture comprising:
an electrically conductive carrier bus having a front surface and a back surface;
a plurality of contact clips electrically coupled to the electrically conductive carrier bus, wherein the plurality of contact clips are distributed on the front surface and the back surface of the electrically conductive carrier bus and configured to electrically couple the two substrates to the front surface of the electrically conductive carrier bus, wherein each of the plurality of contact clips is symmetric about the front surface and the back surface of the electrically conductive carrier bus, and wherein each of the plurality of contact clips comprises a conductive material having a non-conductive coating thereon; and
a non-conductive substrate backer coupled to the electrically conductive carrier bus and configured to separate the two substrates, wherein the non-conductive substrate backer comprises a top portion that extends along a bottom edge portion of the electrically conductive carrier bus and two or more distal extensions that extend from the top portion of the non-conductive substrate backer, wherein the distal extensions are configured to keep the two substrates from contacting.

2. The wafer plating fixture of claim 1 , wherein the electrically conductive carrier bus is configured to attach to an electrically conductive continuous plating belt.

3. The wafer plating fixture of claim 1 , wherein the non-conductive substrate backer comprises two distal extensions.

4. The wafer plating fixture of claim 1 , wherein the non-conductive substrate backer comprises three distal extensions.

5. The wafer plating fixture of claim 1 , wherein the two or more distal extensions are connected by cross bracing to provide rigidity.

6. The wafer plating fixture of claim 1 , wherein the distal extensions are ovoid, round or diamond in cross section for at least a portion of their length to minimize contact with the two substrates.

7. The wafer plating fixture of claim 1 , wherein the distal extensions comprise one or more protrusions along their length that are oriented to provide minimal contact with a tip of the protrusion and the substrates.

8. The wafer plating fixture of claim 1 , wherein the non-conductive substrate backer comprises landing sites for the plurality of contact clips when there is no substrate.

9. The wafer plating fixture of claim 1 , wherein the plurality of contact clips are coupled to the electrically conductive carrier with a clamp bar on either side of the electrically conductive carrier bus.

10. The wafer plating fixture of claim 1 , wherein the plurality of contact clips comprise three or more contact clips distributed on each side of the electrically conductive carrier bus.

11. The wafer plating fixture of claim 1 , wherein each of the contact clips comprises a spring.

12. The wafer plating fixture of claim 1 , wherein the electrically conductive carrier bus comprises a plurality of horizontally distributed openings configured for passage of a contact clamp.

13. The wafer plating fixture of claim 12 , wherein the contact clamp comprises a single piece of metallic material that passes through one of the openings in the electrically conductive carrier bus.

14. The wafer plating fixture of claim 1 , wherein the plurality of contact clips comprise pairs of contact clips, wherein one member of the pair of contact clips is disposed on one side of the electrically conductive carrier bus and the other member of the pair of contact clips is disposed on an opposite side of the electrically conductive carrier bus.

15. The wafer plating fixture of claim 1 , wherein a pair of the plurality of contact clips comprises two non-reversing mirrored pins.

Assignees

• Sunpower Corp

Inventors

• Wang Hung-Ming
• Loscutoff Paul W
• Manalo Raphael M
• Castillo Arnold V
• Mustafa Mohamad Ridzwan
• Kleshock Mark A
• Bergstrom Neil G

Classifications

• H10F19/902

  for series or parallel connection of photovoltaic cells · CPC title

• H10F77/211 Primary

  for photovoltaic cells · CPC title

• C25D17/28

  with means for moving the objects individually through the apparatus during treatment · CPC title

• C25D17/001

  Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells · CPC title

• C25D17/06 Primary

  Suspending or supporting devices for articles to be coated · CPC title