Method and apparatus for offset correction in SAR ADC with reduced capacitor array DAC
US-10581443-B2 · Mar 3, 2020 · US
US11563440B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11563440-B2 |
| Application number | US-202117337505-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 3, 2021 |
| Priority date | Sep 8, 2020 |
| Publication date | Jan 24, 2023 |
| Grant date | Jan 24, 2023 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.
Opening claim text (preview).
What is claimed is: 1. An analog-to-digital conversion device comprising: an analog circuit configured to output an analog input signal; and an analog-to-digital converter configured to receive the analog input signal and configured to output a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor group including a plurality of variable capacitors, a second capacitor group including at least one fixed capacitor, and lower capacitors, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor group by providing a first calibration voltage to at least one of the plurality of variable capacitors and outputs the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor group, the analog-to-digital converter is configured to provide a first reference voltage to the first capacitor group, is configured to provide a second reference voltage having the same magnitude as, but a different sign from, the first reference voltage to the second capacitor group, and is configured to compare the capacitance of the first capacitor group with the capacitance of the second capacitor group, and the first capacitor array includes a first switch group, configured to connect one of the lower capacitors and the fixed capacitor to one of the first reference voltage and a common mode voltage in accordance with a selection signal, and a second switch group, configured to connect one of the variable capacitors to one of the second reference voltage and the common mode voltage, and the common mode voltage to the other lower capacitors and the other variable capacitors in accordance with the selection signal. 2. The analog-to-digital conversion device of claim 1 , wherein the analog-to-digital converter is configured to compare the capacitance of the first capacitor group with the capacitance of the second capacitor group and is configured to provide the first calibration voltage to at least one of the plurality of variable capacitors based on a result of a comparison of the capacitance of the first capacitor group with the capacitance of the second capacitor group. 3. The analog-to-digital conversion device of claim 1 , wherein the analog-to-digital converter is configured to provide the first calibration voltage to at least one of the plurality of variable capacitors based on a result of a comparison of the capacitance of the first capacitor group with the capacitance of the second capacitor group. 4. The analog-to-digital conversion device of claim 3 , wherein if the capacitance of group is greater than the capacitance of the second capacitor group, the analog-to-digital converter is configured to provide the first calibration voltage having the same sign as the second reference voltage to at least one of the plurality of variable capacitors, and if the capacitance of the first capacitor group is smaller than the capacitance of the second capacitor group, the analog-to-digital converter is configured to provide the first calibration voltage having the same sign as the first reference voltage to at least one of the plurality of variable capacitors. 5. The analog-to-digital conversion device of claim 3 , wherein the first calibration voltage is (1/2) n times the first reference voltage (where n is a natural number). 6. The analog-to-digital conversion device of claim 1 , wherein the plurality of variable capacitors include first and second calibration capacitors having the same capacitance, and the analog-to-digital converter is configured to provide the first calibration voltage to the first calibration capacitor based on a result of a comparison of the capacitance of the first capacitor group with the capacitance of the second capacitor group, is configured to compare the calibrated capacitance of the first capacitor group with the capacitance of the second capacitor group, and is configured to provide a second calibration voltage, which is different from the first calibration voltage, based on the result of the comparison of the calibrated capacitance of the first capacitor group with the capacitance of the second capacitor group. 7. The analog-to-digital conversion device of claim 6 , wherein the analog-to-digital converter is configured to provide the first calibration voltage to the first calibration capacitor, is configured to provide the first reference voltage to the first capacitor group, is configured to provide the second reference voltage having the same magnitude as, but a different sign from, the first reference voltage to the second capacitor group, and is configured to compare the calibrated capacitance of the first capacitor group with the capacitance of the second capacitor group. 8. The analog-to-digital conversion device of claim 1 , wherein the first capacitor group includes first and second upper capacitors, which are different from each other, the plurality of variable capacitors include a first calibration capacitor, which is connected to the first upper capacitor, and a second calibration capacitor, which is connected to the second upper capacitor, and the analog-to-digital converter is configured to calibrate the capacitance of the first upper capacitor by providing the first calibration voltage to the first calibration capacitor, and is configured to calibrate the capacitance of the second upper capacitor with the use of the calibrated capacitance of the first upper capacitor and the capacitance of the second capacitor group. 9. The analog-to-digital conversion device of claim 8 , wherein the analog-to-digital converter is configured to provide the common mode voltage to the second upper capacitor while calibrating the capacitance of the first upper capacitor. 10. The analog-to-digital conversion device of claim 8 , wherein the analog-to-digital converter is configured to provide the first reference voltage to the second upper capacitor, is configured to provide the first calibration voltage to the first calibration capacitor, is configured to provide the second reference voltage having the same magnitude as, but a different sign from, the first reference voltage to the second capacitor group, and is configured to compare the capacitance of the second capacitor group with a sum of the calibrated capacitance of the first upper capacitor and the capacitance of the second capacitor group, and the analog-to-digital converter is configured to provide a second calibration voltage, which is different from the first calibration voltage, to the second calibration capacitor based on the result of the comparison of the capacitance of the second capacitor group with the sum of the calibrated capacitance of the first upper capacitor and the capacitance of the second capacitor group. 11. An analog-to-digital conversion device comprising: a plurality of upper capacitors configured to determine upper bits of a digital output signal corresponding to an analog input signal; a plurality of calibration capacitors connected to at least some of the upper capacitors; a plurality of lower capacitors configured to determine lower bits of the digital output signal; and a differential reference voltage generation logic configured to receive first and second reference voltages and configured to generate a first differential reference voltage, which is (1/2) n times the first reference voltage (where n is a natural number), and a second differential reference voltage, which is (1/2) n times the second reference voltage, wherein the calibration capacitors are
at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18) · CPC title
using digitally programmable trimming circuits · CPC title
characterised by the use of methods or means not specific to a particular type of detrimental influence · CPC title
in which the input S/H circuit is merged with the feedback DAC array · CPC title
with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.