Coated semiconductor devices

US11552006B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11552006-B2
Application numberUS-202016936290-A
CountryUS
Kind codeB2
Filing dateJul 22, 2020
Priority dateJul 22, 2020
Publication dateJan 10, 2023
Grant dateJan 10, 2023

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In examples, a semiconductor device comprises a semiconductor die, an opaque mold compound housing covering the semiconductor die, a conductive terminal extending from the mold compound housing, and an insulative coat covering the mold compound housing and at least a portion of the conductive terminal.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a semiconductor die; a mold compound housing covering the semiconductor die; a conductive terminal extending from the mold compound housing, the conductive terminal including a copper portion exposed from a plating portion of the conductive terminal; and an insulative coat covering the mold compound housing and at least a portion of the conductive terminal including the copper portion. 2. The semiconductor device of claim 1 , wherein the mold compound housing comprises plastic. 3. The semiconductor device of claim 1 , wherein the insulative coat covers an entirety of all surfaces of the mold compound housing. 4. The semiconductor device of claim 1 , wherein the conductive terminal includes a first bend and a second bend, and wherein the insulative coat extends from a surface of the mold compound housing to a point between the first bend and the second bend. 5. The semiconductor device of claim 1 , wherein the insulative coat has a thickness ranging from 100 nanometers to 10 microns. 6. The semiconductor device of claim 1 , wherein the insulative coat is composed of a material selected from the group consisting of: a polymer, a solder resist, and a ceramic. 7. The semiconductor device of claim 1 , further comprising a metal member that extends from within the mold compound housing, through the mold compound housing, and to a surface of the mold compound housing, and wherein the insulative coat covers the metal member. 8. An electronic device, comprising: a semiconductor device including an opaque mold compound housing and a conductive terminal extending from the mold compound housing, the conductive terminal having a first bend and a second bend and terminating at an end; an insulative coat covering the mold compound housing and covering at least a first length of the conductive terminal between the mold compound housing and a point between the first and second bends; and a metal joint adapted to be coupled to a printed circuit board(PCB) and the conductive terminal, the metal joint covering the second bend and the end of the conductive terminal, wherein the conductive terminal comprises an exposed area at which a copper portion of the conductive terminal is exposed through a plating portion of the conductive terminal, and wherein the insulative coat covers the exposed area. 9. The electronic device of claim 8 , wherein the mold compound housing is composed of plastic. 10. The electronic device of claim 8 , wherein the insulative coat and the metal joint are configured to prevent whisker formation on the conductive terminal. 11. The electronic device of claim 8 , wherein the insulative coat is selected from the group consisting of: a polymer, a solder resist, and a ceramic. 12. The electronic device of claim 8 , wherein the insulative coat abuts and hermetically seals the mold compound housing. 13. The electronic device of claim 8 , wherein the insulative coat hermetically seals an interface between the mold compound housing and the conductive terminal. 14. The electronic device of claim 8 , wherein the insulative coat comprises a water contact angle of at least 90 degrees. 15. The electronic device of claim 8 , wherein the insulative coat has a thickness ranging from 100 nanometers to 10 microns. 16. A semiconductor device, comprising: a semiconductor die; a plastic housing covering the semiconductor die; a conductive terminal extending from the plastic housing and including a bend, the conductive terminal including a copper portion exposed from a plating portion of the conductive terminal; and a coat covering a surface of the plastic housing and the copper portion. 17. The semiconductor device of claim 16 , wherein the coat comprises an insulative coat. 18. The semiconductor device of claim 17 , wherein the insulative coat covers a length of the conductive terminal including the bend. 19. The semiconductor device of claim 17 , further comprising a metallic coat covering the insulative coat. 20. The semiconductor device of claim 16 , wherein the coat comprises a metallic coat.

Assignees

Inventors

Classifications

  • Exposed leads, i.e. encapsulation of component partly removed for exposing a part of lead, e.g. for soldering purposes · CPC title

  • associated with surface mounted components · CPC title

  • characterised by the leads · CPC title

  • Leads having locally deformed portion, e.g. for retention · CPC title

  • Manufacturing or production processes characterised by the final manufactured product · CPC title

Patent family

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11552006B2 cover?
In examples, a semiconductor device comprises a semiconductor die, an opaque mold compound housing covering the semiconductor die, a conductive terminal extending from the mold compound housing, and an insulative coat covering the mold compound housing and at least a portion of the conductive terminal.
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H10W70/458. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 10 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).