Semiconductor device with a porous portion, wafer composite and method of manufacturing a semiconductor device

US11476111B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11476111-B2
Application numberUS-202016811192-A
CountryUS
Kind codeB2
Filing dateMar 6, 2020
Priority dateMar 6, 2019
Publication dateOct 18, 2022
Grant dateOct 18, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer. At least a portion of the auxiliary layer and at least a portion of the surface layer are converted into a porous structure. Subsequently, an epitaxial layer is formed on the first main surface.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a semiconductor device, comprising: providing a semiconductor substrate that comprises a base portion, an auxiliary layer on the base portion, and a surface layer on the auxiliary layer, wherein the surface layer is in contact with a first main surface of the semiconductor substrate, and wherein the auxiliary layer has a higher electrochemical dissolution efficiency than the base portion and the surface layer; converting into a porous structure: (i) at least a portion of the auxiliary layer that, before the converting, has the higher electrochemical dissolution efficiency than the base portion and the surface layer; and (ii) at least a portion of the surface layer; and forming, after the converting, an epitaxial layer on the first main surface. 2. The method according to claim 1 , comprising: separating the epitaxial layer from the base portion along the porous structure. 3. The method according to claim 1 , wherein the epitaxial layer and the semiconductor substrate differ in at least one main constituent. 4. The method according to claim 1 , wherein a mean net dopant concentration in the auxiliary layer is at least 100 times a mean net dopant concentration in the surface layer. 5. The method according to claim 1 , wherein the surface layer and the auxiliary layer have a same conductivity type. 6. The method according to claim 1 , wherein the semiconductor substrate is a silicon carbide substrate. 7. The method according to claim 1 , wherein the first main surface is exposed during formation of the porous structure. 8. The method according to claim 1 , comprising: forming, prior to the converting, a mask on the first main surface, wherein mask openings in the mask expose first sections of the surface layer. 9. The method according to claim 8 , comprising: recessing, prior to the converting, the first sections to form pits in the first main surface. 10. The method according to claim 8 , comprising: implanting, prior to the converting, dopants into the first sections. 11. The method according to claim 9 , comprising: implanting, prior to the converting, dopants into the first sections. 12. A method of manufacturing a semiconductor device, comprising: providing a semiconductor substrate, wherein the semiconductor substrate comprises a base portion and an auxiliary layer on the base portion; forming pits in the auxiliary layer; and converting at least a portion of the auxiliary layer into a porous structure, wherein the porous structure comprises a layered portion and laterally separated columnar portions, and wherein the layered portion is formed at a distance to a first main surface of the semiconductor substrate and the laterally separated columnar portions extend from the pits to the layered portion. 13. The method according to claim 12 , comprising: forming, after the converting, an epitaxial layer on the first main surface; and separating the epitaxial layer from the base portion along the layered portion.

Assignees

Inventors

Classifications

  • by making porous regions on the surface · CPC title

  • using masks for semiconductor materials · CPC title

  • into insulating materials · CPC title

  • Deposition of epitaxial materials · CPC title

  • Silicon carbide · CPC title

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What does patent US11476111B2 cover?
A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface …
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10P14/665. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 18 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).