Superconductive memory cells and devices

Patent metadata

Field	Value
Publication number	US-11475945-B2
Application number	US-202117234701-A
Country	US
Kind code	B2
Filing date	Apr 19, 2021
Priority date	Aug 16, 2018
Publication date	Oct 18, 2022
Grant date	Oct 18, 2022

Abstract

An electronic device includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material includes a first wire and a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state.

First claim

What is claimed is:

1. An electronic device, comprising:
a substrate; and
a layer of superconducting material disposed over the substrate, wherein the layer of superconducting material comprises:
a first wire; and
a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state.

2. The electronic device of claim 1 , wherein the layer of superconducting material further includes:
a second wire that is (i) distinct and separate from the first wire and the loop and (ii) capacitively coupled to the loop while the loop and the second wire are in the superconducting state.

3. The electronic device of claim 2 , further comprising:
a heating element thermally coupled to the second wire; and
circuitry to activate and deactivate the heating element.

4. The electronic device of claim 1 , wherein:
the first wire has a notch formed therein at a location along the first wire; and
dimensions of the first wire at the notch are such that a density of a current at the location along the first wire exceeds a critical current density, thereby transitioning the first wire from the superconducting state to a resistive state upon application of a current.

5. The electronic device of claim 1 , wherein the loop is elongated along a direction of the first wire.

6. The electronic device of claim 1 , further including a dielectric material disposed coplanar with the first wire and the loop.

7. An electronic device, comprising:
a memory cell, the memory cell including:
a first wire made of a first superconducting material; and
a loop that is:
made of a second superconducting material;
distinct and separate from any other electrical wire, including the first wire; and
capacitively coupled to the first wire while in a superconducting state; and

circuitry to direct a write current to the first wire of the memory cell.

8. The electronic device of claim 7 , wherein the first superconducting material and the second superconducting material are the same superconducting material.

9. The electronic device of claim 7 , wherein the first wire and the loop are formed from distinct instances of a layer of the same superconducting material.

10. The electronic device of claim 7 , wherein the first superconducting material and the second superconducting material are different superconducting materials.

11. A memory device, comprising,
an array of memory cells, each memory cell of the array of memory cells comprising:
a substrate;
a layer of superconducting material disposed over the substrate, wherein the layer of superconducting material comprises:
a first wire; and
a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state; and

circuitry to address a respective memory cell in the array of memory cells so as to direct a write current to the first wire of a respective memory cell.

Assignees

• Psiquantum Corp

Inventors

• Najafi Faraz

Classifications

• G11C11/44 Primary

  using super-conductive elements, e.g. cryotron · CPC title

• H01L39/24

  Electricity · mapped topic

• H01L39/16

  Electricity · mapped topic

• H01L27/18

  Electricity · mapped topic

• H01L39/12

  Electricity · mapped topic