Method of bottom-up metallization in a recessed feature

Patent metadata

Field	Value
Publication number	US-11450562-B2
Application number	US-202017021586-A
Country	US
Kind code	B2
Filing date	Sep 15, 2020
Priority date	Sep 16, 2019
Publication date	Sep 20, 2022
Grant date	Sep 20, 2022

Abstract

A method of metallization includes receiving a substrate having a recess formed therein. The recess has a bottom and sidewalls, and a conformal liner is deposited on the bottom and sidewalls of the recess. The conformal liner is removed from an upper portion of the recess to expose upper sidewalls of the recess while leaving the conformal liner in a lower portion of the recess covering the bottom and lower sidewalls of the recess. Metal is deposited in a lower portion of the recess to form a metallization feature including the conformal liner in the lower portion of the recess and the metal.

First claim

What is claimed is:

1. A method of metallization, the method comprising:
receiving a substrate having a recess formed therein, the recess having a bottom and sidewalls;
depositing a conformal liner on the bottom and sidewalls of the recess;
removing the conformal liner from an upper portion of the recess to expose upper sidewalls of the recess while leaving the conformal liner in a lower portion of the recess covering the bottom and lower sidewalls of the recess; and
selectively depositing a metal in the lower portion of the recess to form a metallization feature comprising the conformal liner in the lower portion of the recess and the metal, wherein the selectively depositing the metal comprises depositing a self-assembled monolayer only over the conformal liner and depositing a metal only on the self-assembled monolayer, the self-assembled monolayer being a precursor for metal nucleation.

2. The method of claim 1 , wherein said removing the conformal liner comprises:
depositing a material to cover the conformal liner in the lower portion of the recess; and
selectively etching the conformal liner from the upper portion of the recess relative to the material covering the conformal liner in the lower portion of the recess.

3. The method of claim 2 , wherein the depositing a material comprises depositing either a metal that will form a portion of the metallization feature in the lower portion of the recess, or depositing a blocking material that will not form a portion of the metallization feature in the lower portion of the recess.

4. The method of claim 1 , further comprising surface treating the exposed upper sidewalls of the recess with a self-aligning monolayer to facilitate selective deposition of the metal relative to the exposed sidewalls.

5. A method of processing a substrate, the method comprising:
receiving a substrate having a patterned first layer defining a recessed feature, the recessed feature defining a bottom and sidewalls;
depositing a liner film on the substrate, the liner film conformally lining uncovered surfaces;
performing an initial metal deposition process that deposits a metal relatively more on lower portions of sidewalls of the recessed feature as compared to upper portions of sidewalls of the recessed feature;
recessing the initial metal deposition to a predetermined depth within the recessed feature resulting in a recessed metal deposition;
removing uncovered portions of the liner film from the substrate while leaving covered portions of the liner film covering the bottom and lower sidewalls of the recess; and
selectively depositing the metal on the recessed metal deposition by an area-selective deposition process that deposits the metal only on the recessed metal deposition relative to the rest of the substrate.

6. The method of claim 5 , wherein the area-selective deposition process fills gaps in the recessed metal deposition.

7. The method of claim 5 , wherein the area-selective deposition process changes a cross-sectional profile of the recessed metal deposition by reducing concavity of the cross-sectional profile.

8. The method of claim 5 , wherein the substrate further comprises a second layer below the first layer, the first layer having the recessed feature extending into the second layer.

9. The method of claim 8 , wherein:
the first layer is a dielectric material; and
the second layer is a semiconductor material.

10. The method of claim 9 , wherein:
the first layer is silicon oxide; and
the second layer is silicon.

11. The method of claim 5 , wherein the area-selective deposition process comprises:
depositing a self-assembled monolayer directly on uncovered portions of the first layer, the self-assembled monolayer reducing metal nucleation on the first layer; and
performing a metal deposition process, the metal selectively depositing on the recessed metal deposition.

12. The method of claim 5 , wherein the area-selective deposition process comprises:
depositing a self-assembled monolayer directly over the recessed metal deposition, the self-assembled monolayer being a precursor for metal nucleation; and
performing a metal deposition process, the metal selectively depositing on the recessed metal deposition.

13. The method of claim 5 , further comprising:
cleaning the substrate to remove metal that is non-selectively deposited on uncovered portions of the first layer.

14. A method of processing a substrate, the method comprising:
receiving a substrate having a patterned first layer defining a recessed feature, the recessed feature defining a bottom and sidewalls;
depositing a liner film on the substrate, the liner film conformally lining uncovered surfaces;
filling the recessed feature with a fill material and recessing the fill material to a predetermined depth, remaining fill material covering a portion of the liner film;
removing uncovered portions of the liner film from the substrate so that the remaining liner film lines the bottom and portions of sidewalls of the recessed feature;
removing the remaining fill material, leaving the remaining liner film uncovered; and
selectively depositing a metal over the remaining liner film by an area-selective deposition process that deposits the metal only on the remaining liner film relative to the rest of the substrate, wherein the area-selective deposition process comprises depositing a self-assembled monolayer only over the remaining liner film and depositing the metal only on the self-assembled monolayer, the self-assembled monolayer being a precursor for metal nucleation.

15. The method of claim 14 , wherein the substrate further comprises a second layer below the first layer, the first layer having the recessed feature extending into the second layer.

16. The method of claim 15 , wherein:
the first layer is a dielectric material; and
the second layer is a semiconductor material.

17. The method of claim 16 , wherein:
the first layer is silicon oxide; and
the second layer is silicon.

18. The method of claim 14 , wherein the area-selective deposition process comprises:
depositing a self-assembled monolayer directly on uncovered portions of the first layer, the self-assembled monolayer reducing metal nucleation on the first layer; and
performing a metal deposition process, the metal selectively depositing on the remaining liner film.

19. The method of claim 14 , further comprising:
cleaning the substrate to remove metal that is non-selectively deposited on uncovered portions of the first layer.

Assignees

• Tokyo Electron Ltd

Inventors

• Yu Kai-Hung
• Grzeskowiak Jodi
• Joy Nicholas
• Smith Jeffrey

Classifications

• H10W20/054

  by selectively removing parts thereof (H10W20/034 takes precedence) · CPC title

• H10W20/0595

  by using multiple deposition steps separated by etching steps · CPC title

• H10W20/0765

  the thin functional dielectric layers being temporary, e.g. sacrificial layers · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H10W20/427 Primary

  Power or ground buses · CPC title