Handler bonding and debonding for semiconductor dies

US11424152B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11424152-B2
Application numberUS-202016779783-A
CountryUS
Kind codeB2
Filing dateFeb 3, 2020
Priority dateDec 30, 2015
Publication dateAug 23, 2022
Grant dateAug 23, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

First claim

Opening claim text (preview).

What is claimed is: 1. A system for processing semiconductor devices, the system comprising: memory; at least one processor operatively coupled to the memory; at least one control unit operatively coupled to the memory and the at least one processor, the at least one control unit operating at least one semiconductor device processing component; and a semiconductor package comprising: at least one singulated semiconductor device bonded to a handler; a release layer in direct contact with the handler, wherein the release layer is vulnerable to ablation and comprises at least one additive material therein, the at least one additive material adjusts a frequency of electro-magnetic radiation absorption property of the release layer; and an insulating layer situated between the release layer and the at least one singulated semiconductor device, wherein the at least one control unit operates the at least one semiconductor device processing component to: bond the at least one singulated semiconductor device to the handler; package the at least one singulated semiconductor device while it is bonded to the handler; ablate the release layer by irradiating the release layer through the handler with a laser; and remove the at least one singulated semiconductor device from the handler after the release layer has been ablated. 2. The system for processing semiconductor devices of claim 1 , wherein the semiconductor package comprises an adhesive layer, that is distinct from the release layer, between the at least one singulated semiconductor device and the release layer. 3. The system for processing semiconductor devices of claim 1 , wherein the at least one additive material comprises a single additive material, wherein the single additive material is one of chemical absorber for a 355 nm wavelength and a chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm, and wherein the single additive material is effective at room temperature to a temperature greater than 250° C. and is thermally stable at a temperature ≥250° C. 4. The system for processing semiconductor devices of claim 1 , wherein the at least one additive material comprises a first additive material and a second additive material, wherein the first additive material is a chemical absorber for a 355 nm wavelength and the second additive material is a chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm, and wherein the each of the first and second additive materials is thermally stable at a temperature ≥250° C. 5. The system for processing semiconductor devices of claim 1 , wherein the at least one additive material comprises one of a single additive material or multiple additive materials. 6. The system for processing semiconductor devices of claim 1 , wherein the insulating layer is separate from any adhesive layer within and/or in contact with the release layer.

Assignees

Inventors

Classifications

  • used to support a device or a wafer when forming electrical connections thereto · CPC title

  • the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support · CPC title

  • Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title

  • H10P72/74Primary

    using temporarily an auxiliary support · CPC title

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11424152B2 cover?
Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising …
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10P72/74. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 23 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).