Package comprising a substrate configured as a heat spreader

Patent metadata

Field	Value
Publication number	US-11404343-B2
Application number	US-202016789272-A
Country	US
Kind code	B2
Filing date	Feb 12, 2020
Priority date	Feb 12, 2020
Publication date	Aug 2, 2022
Grant date	Aug 2, 2022

Abstract

A package that includes a first substrate, an integrated device coupled to the first substrate, a second substrate coupled to the integrated device, and an encapsulation layer located between the first substrate and the second substrate. The second substrate is configured to operate as a heat spreader. The second substrate is configured to be free of an electrical connection with the integrated device.

First claim

The invention claimed is:

1. A package comprising:
a first substrate comprising a first coefficient of thermal expansion (CTE) having a value in a range of about 7-15 parts per million per degree Celsius (ppm/C);
an integrated device coupled to the first substrate;
a second substrate coupled to the integrated device,
wherein the second substrate is configured to operate as a heat spreader,
wherein the second substrate comprises a dielectric layer and a plurality of interconnects,
wherein the second substrate is configured to be free of an electrical connection with the integrated device, and
wherein the second substrate comprises a second coefficient of thermal expansion (CTE) having a value in a range of about 7-15 parts per million per degree Celsius (ppm/C); and

an encapsulation layer located between the first substrate and the second substrate.

2. The package of claim 1 , further comprising a thermal interface material (TIM) located between the second substrate and the integrated device, wherein the thermal interface material (TIM) is configured to couple the second substrate to the integrated device.

3. The package of claim 1 ,
wherein the integrated device comprises a front side and a back side,
wherein the front side of the integrated device faces the first substrate, and
wherein the back side of the integrated device faces the second substrate.

4. The package of claim 1 , wherein the first substrate comprises a laminated substrate.

5. The package of claim 1 , wherein the plurality of interconnects comprises a plurality of vias.

6. A package comprising:
a first substrate;
an integrated device coupled to the first substrate;
a second substrate coupled to the integrated device,
wherein the second substrate is configured to operate as a heat spreader, and
wherein the second substrate comprises a dielectric layer and a plurality of interconnects,
wherein the plurality of interconnects is configured to be free of an electrical connection with the integrated device,
wherein the plurality of interconnects comprises a plurality of vias,
wherein a via from the plurality of vias comprises (i) a first metal layer located on a wall of a cavity of the second substrate, and (ii) a second metal layer located in the cavity of the second substrate, and

an encapsulation layer located between the first substrate and the second substrate.

7. The package of claim 1 , wherein the second coefficient of thermal expansion (CTE) that is similar to the first coefficient of thermal expansion (CTE).

8. The package of claim 1 , further comprising an underfill located between the integrated device and the first substrate.

9. The package of claim 1 , wherein the package is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, and a device in an automotive vehicle.

10. An apparatus comprising:
a first substrate comprising a thickness of 400 micrometers or less;
an integrated device coupled to the first substrate;
means for heat spreading coupled to the integrated device,
wherein the means for heat spreading is configured to be free of an electrical connection with the integrated device, and
wherein the means for heat spreading comprises a thickness of 200 micrometers or less; and

an encapsulation layer located between the first substrate and the means for heat spreading, wherein the encapsulation layer comprises a thickness of 200 micrometers or less.

11. The apparatus of claim 10 , further comprising a thermal interface material (TIM) located between the means for heat spreading and the integrated device, wherein the thermal interface material (TIM) is configured to couple the means for heat spreading to the integrated device.

12. The apparatus of claim 10 ,
wherein the integrated device comprises a front side and a back side,
wherein the front side of the integrated device faces the first substrate, and
wherein the back side of the integrated device faces the means for heat spreading.

13. The apparatus of claim 10 , wherein the first substrate comprises a laminated substrate.

14. The apparatus of claim 10 , wherein the means for heat spreading comprises a dielectric layer and a plurality of interconnects that is configured to be free of an electrical connection with the integrated device.

15. The apparatus of claim 14 , wherein the plurality of interconnects comprises a plurality of vias.

16. The apparatus of claim 15 , wherein a via from the plurality of vias comprises (i) a first metal layer located on a wall of a cavity of the means for heat spreading, and (ii) a second metal layer located in the cavity of the means for heat spreading.

17. The apparatus of claim 10 ,
wherein the first substrate comprises a first coefficient of thermal expansion (CTE), and
wherein the means for heat spreading comprises a second coefficient of thermal expansion (CTE) that is similar to the first coefficient of thermal expansion (CTE).

18. The apparatus of claim 10 , further comprising an underfill located between the integrated device and the first substrate.

19. The apparatus of claim 10 , wherein the apparatus is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, and a device in an automotive vehicle.

20. A method for fabricating a package, comprising:
providing a first substrate;
coupling an integrated device to the first substrate;
coupling a second substrate to the integrated device,
wherein the second substrate is configured to operate as a heat spreader,
wherein the second substrate comprises a dielectric layer and a plurality of interconnects,
wherein the dielectric layer of the second substrate includes glass, silicon, quartz, and/or combinations thereof;
wherein the second substrate is configured to be free of an electrical connection with the integrated device; and

forming an encapsulation layer between the first substrate and the second substrate.

21. The method of claim 20 , further comprising providing a thermal interface material (TIM) between the second substrate and the integrated device, wherein the thermal interface material (TIM) is configured to couple the second substrate to the integrated device.

22. The method of claim 20 ,
wherein the integrated device comprises a front side and a back side,
wherein the front side of the integrated device faces the first substrate, and
wherein the back side of the integrated device faces the second substrate.

23. The method of claim 20 , wherein the first substrate comprises a laminated substrate.

24. The method of claim 20 , wherein the plurality of interconnects comprises a plurality of vias.

25. The method of claim 24 , wherein a via from the plurality of vias comprises (i) a first metal layer located on a wall of a cavity of the second substrate, and (ii) a second metal layer lo

Assignees

• Qualcomm Inc

Inventors

• Rae David Fraser
• Holmes John
• Hsu Marcus
• Kang Kuiwon
• Sodhi Avantika

Classifications

• H10W72/0198

  batch processes · CPC title

• H10W72/073

  of die-attach connectors · CPC title

• H10W72/072

  of bump connectors · CPC title

• H10W72/877

  Bump connectors and die-attach connectors · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title