Transceiver front-end with receiver branch matching network including integrated electrostatic discharge protection

Patent metadata

Field	Value
Publication number	US-11380993-B2
Application number	US-201916720279-A
Country	US
Kind code	B2
Filing date	Dec 19, 2019
Priority date	Dec 19, 2019
Publication date	Jul 5, 2022
Grant date	Jul 5, 2022

Abstract

Disclosed are embodiments of a transceiver front-end configured for a reduced noise figure (NF). Each of the embodiments includes an antenna, a transmitter branch and a receiver branch all connected to an input/output pad. The transmitter branch is coupled to the input/output pad (and thereby the antenna) by an impedance transformer. Only the receiver branch is selectively electrically connected to the input/output pad (and thereby the antenna) by a switch. A common matching network between the input/output pad and the switch provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier, thereby reducing NF. Specific embodiments are disclosed for integration into specific technologies (e.g., fully depleted silicon-on-insulator (FDSOI) technology and fin-type field effect transistor (finFET) technology).

First claim

What is claimed is:

1. A transceiver front-end comprising:
an antenna;
a transmitter branch; and
a receiver branch, wherein the antenna, the transmitter branch and the receiver branch are connected to an input/output pad, wherein the transceiver front-end is operable in a transmit mode and a receive mode, and wherein the receiver branch comprises:
a low noise amplifier;
a switch,
wherein the switch alternatively disconnects the low noise amplifier from the input/output pad and connects the low noise amplifier to the input/output pad,
wherein, when the low noise amplifier is disconnected from the input/output pad by the switch, the transceiver front-end operates in the transmit mode,
wherein, when the low noise amplifier is connected to the input/output pad by the switch, the transceiver front-end operates in the receive mode, and
wherein, when the transceiver front-end is in the receive mode, the low noise amplifier amplifies input signals received by the antenna; and

a matching network within the receiver branch between the input/output pad and the low noise amplifier and operably connected to the switch and the low noise amplifier, wherein the matching network provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier.

2. The transceiver front-end of claim 1 ,
wherein the transmitter branch comprises a power amplifier that, during the transmit mode, generates output signals and wherein the transmitter branch further comprises an impedance transformer that couples the power amplifier to the input/output pad allowing the antenna to transmit the output signals, and
wherein the switch comprises series-connected n-type field effect transistors and wherein a sum of all drain-source voltages of the series-connected n-type field effect transistors in the switch is greater than a maximum output voltage of the power amplifier to prevent the switch from turning on during the transmit mode.

3. The transceiver front-end of claim 1 ,
wherein the matching network comprises: an inductor and a capacitor electrically connected in series between ground and an input terminal of the switch, and
wherein the receiver branch further comprises a bias resistor electrically connected to an input terminal of the switch enabling different bias voltages to be applied to the input terminal of the switch during the transmit mode and the receive mode, respectively.

4. The transceiver front-end of claim 3 ,
wherein the receiver branch further comprises a second bias resistor electrically connected to an input terminal of the low noise amplifier, and
wherein the matching network further comprises a second capacitor electrically connected to between an output terminal of the switch and the second bias resistor.

5. The transceiver front-end of claim 1 ,
wherein the receiver branch further comprises a shunt device downstream of the switch and upstream of the low noise amplifier, and
wherein the shunt device is in an off state during the receive mode and in an on state during the transmit mode.

6. A transceiver front-end comprising:
an antenna;
a transmitter branch; and
a receiver branch, wherein the antenna, the transmitter branch and the receiver branch are connected to an input/output pad, wherein the transceiver front-end is operable in a transmit mode and a receive mode, and wherein the receiver branch comprises:
a low noise amplifier;
a switch,
wherein the switch comprises fully depleted, planar, series-connected n-type field effect transistors on a buried insulator layer above a semiconductor substrate,
wherein the switch alternatively disconnects the low noise amplifier from the input/output pad connects the low noise amplifier to the input/output pad,
wherein, when the low noise amplifier is disconnected from the input/output pad by the switch, the transceiver front-end operates in a transmit mode,
wherein, when the low noise amplifier is connected to the input/output pad by the switch, the transceiver front-end operates in a receive mode, and
wherein, when the transceiver front-end is in the receive mode, the low noise amplifier amplifies input signals received by the antenna; and

a matching network within the receiver branch between the input/output pad and the low noise amplifier and operably connected to the switch and the low noise amplifier, wherein the matching network provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier.

7. The transceiver front-end of claim 6 ,
wherein the transmitter branch comprises a power amplifier that, during the transmit mode, generates output signals and wherein the transmitter branch further comprises an impedance transformer that couples the power amplifier to the input/output pad allowing the antenna to transmit the output signals, and
wherein a sum of all drain-source voltages of all n-type field effect transistors in the switch is greater than a maximum output voltage of the power amplifier to prevent the switch from turning on during the transmit mode.

8. The transceiver front-end of claim 6 , wherein a region of the semiconductor substrate aligned below the switch is a high resistance region.

9. The transceiver front-end of claim 6 , wherein the matching network comprises: an inductor and a capacitor electrically connected in series between ground and an input terminal of the switch.

10. The transceiver front-end of claim 6 ,
wherein the receiver branch further comprises a bias resistor electrically connected to an input terminal of the switch enabling different bias voltages to be applied to the input terminal of the switch during the transmit mode and the receive mode, respectively.

11. The transceiver front-end of claim 10 ,
wherein a positive bias voltage applied to the input terminal of the switch during the receive mode is equal to an optimal input voltage for the low noise amplifier, and
wherein a positive bias voltage applied to the input terminal of the switch during the transmit mode is greater than the positive bias voltage applied during the receive mode.

12. The transceiver front-end of claim 11 , the receiver branch further comprising a shunt device downstream of the switch and upstream of the low noise amplifier, wherein the shunt device is in an on-state during the transmit mode and in an off-state during the receive mode.

13. The transceiver front-end of claim 12 , wherein the shunt device comprises a fully depleted planar p-type field effect transistor on the buried insulator layer.

14. A transceiver front-end comprising:
an antenna;
a transmitter branch; and
a receiver branch, wherein the antenna, the transmitter branch and the receiver branch are connected to an input/output pad, wherein the transceiver front-end is operable in a transmit mode and a receive mode, and wherein the receiver branch comprises:
a low noise amplifier;
a switch,
wherein the switch comprises series-connected n-type fin-type field effect transistors on a semiconductor substrate,
wherein the switch alternatively disconnects the low noise amplifier from the input/output pad and connects the low noise amplifier to the input/output pad,
wherein, when the low noise amplifier is disconnected from the input/output pad by the switch, the transceiver front-end operates in a transmit mode,
wherein, when the low noise amplifier is connected to the input/output pad by the switch, the transceiver front-end operates in a receive mode, and
wherein, when the transceiver front-end is in the receive mode, the low noise amplifier amplifies input signals received by the

Assignees

• Globalfoundries Us Inc

Inventors

• Bellaouar Abdellatif

Classifications

• H04B1/40 Primary

  Circuits · CPC title

• H03F2203/45731

  the LC comprising a transformer · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H01Q5/335 Primary

  at the feed, e.g. for impedance matching · CPC title

• H03F1/086 Primary

  with FET's · CPC title