Dielectric-dielectric and metallization bonding via plasma activation and laser-induced heating

Patent metadata

Field	Value
Publication number	US-11374148-B2
Application number	US-202016748689-A
Country	US
Kind code	B2
Filing date	Jan 21, 2020
Priority date	Jun 11, 2019
Publication date	Jun 28, 2022
Grant date	Jun 28, 2022

Abstract

The invention is directed towards enhanced systems and methods for employing a pulsed photon (or EM energy) source, such as but not limited to a laser, to electrically couple, bond, and/or affix the electrical contacts of a semiconductor device to the electrical contacts of another semiconductor devices. Full or partial rows of LEDs are electrically coupled, bonded, and/or affixed to a backplane of a display device. The LEDs may be μLEDs. The pulsed photon source is employed to irradiate the LEDs with scanning photon pulses. The EM radiation is absorbed by either the surfaces, bulk, substrate, the electrical contacts of the LED, and/or electrical contacts of the backplane to generate thermal energy that induces the bonding between the electrical contacts of the LEDs' electrical contacts and backplane's electrical contacts. The temporal and spatial profiles of the photon pulses, as well as a pulsing frequency and a scanning frequency of the photon source, are selected to control for adverse thermal effects.

First claim

What is claimed is:

1. A method for coupling a semiconductor device to a target substrate, wherein the semiconductor device includes a first surface and a first contact disposed on the first surface, the target substrate includes a second surface and a second contact, and the method comprises:
forming a first insulating layer on the first surface, wherein the first insulating layer covers a portion of the first surface and exposes a distal portion of the first contact;
forming a second insulating layer on the second surface that at least partially forms a recessed void on the second surface such that the second contact is at least partially disposed within the recessed void, wherein the second insulating layer covers a portion of the second surface and exposes a distal portion of the second contact;
exposing the first insulating layer and the second insulating layer to a plasma that activates each of the first insulating layer and the second insulating layer;
positioning the semiconductor device proximate to the target substrate to form a spatial alignment of the first contact with the second contact, wherein the activated first and second insulating layers are adjacent and opposed layers, and the exposed distal portion of the second contact is adjacent the exposed distal portion of the first contact;
applying a compressive force to at least one of the semiconductor device or the target substrate to form a mechanical coupling between the semiconductor device and the target substrate by chemically bonding the activated first insulating layer to the activated second insulating layer, wherein the compressive force deforms a shape of the second contact such that the deformed shape of the second contact at least partially fills the recessed void; and
forming an electrical coupling between the semiconductor device and the target substrate by electrically bonding the exposed distal portion of the second contact to the adjacent distal portion of the first contact via inducing thermal energy with associated thermal effects that are localized to the first and second contacts, wherein the mechanical coupling between the semiconductor device and the target substrate mechanically stabilizes the electrical coupling.

2. The method of claim 1 , wherein at least one of the first or second insulating layers is comprised of silicon dioxide.

3. The method of claim 1 , wherein at least one of the first contact or the second contact comprises nanoporous gold (NPG).

4. The method of claim 1 , wherein the applied plasma planarizes the activated first insulating layer and the activated second insulating layer to enhance the chemical bonding of the activated first insulating layer and the activated second insulating layer.

5. The method of claim 1 , wherein at least a portion of the recessed void is disposed between a portion of the second insulating layer and the second contact.

6. The method of claim 1 , wherein the compressive force deforms a shape of the first contact.

7. The method of claim 1 , wherein positioning the semiconductor device proximate to the target substrate and forming a mechanical coupling between the semiconductor device and the target substrate are performed at room temperature and at atmospheric pressure.

8. The method of claim 1 , wherein the semiconductor device is a first pre-diced semiconductor die included in a first semiconductor wafer and the target substrate is a second pre-diced semiconductor die included in a second semiconductor wafer, and wherein positioning the semiconductor device proximate to the target substrate includes positioning the first semiconductor wafer proximate the second semiconductor wafer.

9. The method of claim 1 , wherein the induced thermal energy is induced by a photon pulse with a temporal profile that is selected to control thermal effects associated with thermal energy, and wherein controlling the thermal effects includes localizing the thermal effects to the first and second contacts.

10. The method of claim 9 , wherein the photon pulse is transmitted by a pulsed photon beam that is scanned across at least one of the semiconductor device or the target substrate.

Assignees

• Facebook Tech Llc

Inventors

• Brodoceanu Daniel
• Abad Oscar Torrents
• Wu Jeb
• Chio Zheng Sung
• Farrens Sharon Nanette
• Sengul Ali
• Nguty Tennyson

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W72/07168

  Means for storing or moving the material for the connector · CPC title

• H10W72/07141

  Means for applying energy, e.g. ovens or lasers · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/90

  Bond pads, in general · CPC title