Power semiconductor module embedded in a mold compounded with an opening

US11362008B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11362008-B2
Application numberUS-202016737378-A
CountryUS
Kind codeB2
Filing dateJan 8, 2020
Priority dateJul 12, 2017
Publication dateJun 14, 2022
Grant dateJun 14, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention provides a power semiconductor module, including a substrate having an electric insulating main layer being provided with a structured top metallization and with a bottom metallization, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the main layer together with its top metallization and the at least one power semiconductor device is embedded in a mold compound such that the mold compound includes at least one opening for contacting the at least one contact area, and wherein power semiconductor module includes a housing with circumferential side walls, wherein the side walls are positioned above the main layer of the substrate so that the side walls are only present in a space above a plane through the main layer of the substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power semiconductor module comprising: a substrate having an electrically insulating main layer, a top metallization positioned above the main layer, and a bottom metallization positioned below the main layer, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the electrically insulating main layer together with its top metallization and the at least one power semiconductor device is embedded in a monolithic body made of mold compound such, that the mold compound comprises at least one opening for contacting the at least one contact area; and a housing with circumferential side walls, which are connected onto the mold compound, such that an entirety of the side walls are positioned above the main layer, wherein the circumferential side walls of the housing are connected to the monolithic body by physically contacting a peripheral region of the monolithic body with the circumferential side walls. 2. The power semiconductor module according to claim 1 , wherein the circumferential side walls are spaced apart from the substrate by the mold compound in a direction orthogonal to a plane parallel to the substrate. 3. The power semiconductor module according to claim 1 , wherein an extension area of the substrate overlaps an extension area of the side walls, when projected onto a plane parallel to the substrate. 4. The power semiconductor module according to claim 1 , wherein the openings are filled with an electrical insulator. 5. The power semiconductor module according to claim 1 , wherein fixing rings for fixing the substrate to a cooler are located in the mold compound. 6. The power semiconductor module according to claim 1 , wherein the housing is connected to the mold compound by means of gluing or by means of a screw connection. 7. The power semiconductor module according to claim 1 , wherein the housing is sealed against the mold compound. 8. The power semiconductor module according to claim 1 , wherein the bottom metallization is partly embedded in the mold compound. 9. The power semiconductor module according to claim 1 , wherein the mold compound comprises an epoxy mold compound. 10. The power semiconductor module according to claim 1 , wherein at least one of the top metallization and the bottom metallization is coated with a protection coating. 11. The power semiconductor module according to claim 1 , wherein at least one terminal is welded to a contact area of the top metallization. 12. The power semiconductor module according to claim 1 , wherein additionally to the mold compound, a protective coating is applied around the top metallization edges. 13. The power semiconductor module according to claim 12 , wherein the protective coating is formed from polyimide. 14. A power semiconductor module comprising: a substrate having an electrically insulating main layer, top metallization positioned above the main layer, and a bottom metallization positioned below the main layer, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area; a molded body made of mold compound, wherein the electrically insulating main layer together with its top metallization and the at least one power semiconductor device is embedded in a mold compound such, that the mold compound comprises at least one opening for contacting the at least one contact area, a major surface facing away from the substrate and an opposite second surface physically contacting the substrate spaced apart by sidewalls, and a first thickness between the first major surface and the second major surface; and a housing with circumferential side walls, which are connected onto the mold compound, such that an entirety of the side walls are positioned above the main layer, and wherein the circumferential side walls are spaced apart from the substrate by the first thickness of the mold compound in a direction orthogonal to a plane parallel to the substrate. 15. The power semiconductor module according claim 14 , wherein an extension area of the substrate overlaps an extension area of the side walls, when projected onto a plane parallel to the substrate. 16. The power semiconductor module according claim 15 , wherein fixing rings for fixing the substrate to a cooler are located in the mold compound. 17. The power semiconductor module according claim 16 , wherein the housing is connected to the mold compound by means of gluing or by means of a screw connection. 18. The power semiconductor module according claim 17 , wherein the housing is sealed against the mold compound. 19. A power semiconductor module comprising: a substrate having an electrically insulating main layer, top metallization positioned above the main layer, and a bottom metallization positioned below the main layer, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area; a base plate provided with a mold compound and configured to provide a mechanically stable arrangement for holding the substrate, wherein the electrically insulating main layer together with its top metallization and the at least one power semiconductor device is embedded in the mold compound such, that the mold compound comprises at least one opening for contacting the at least one contact area; and a housing with circumferential side walls, wherein an entirety of the side walls are positioned above the main layer, the housing being attached to the substrate through the base plate, the circumferential side walls of the housing being aligned with circumferential sidewalls of the base plate. 20. The power semiconductor module according claim 19 , wherein the base plate comprises through holes for receiving screws in order to screw the housing to the substrate.

Assignees

Inventors

Classifications

  • Subject matter not provided for in other groups of this subclass · CPC title

  • the encapsulations being in grooves in the semiconductor body · CPC title

  • characterised by their materials · CPC title

  • using moulds · CPC title

  • being on a metallic substrate, e.g. insulated metal substrates [IMS] · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11362008B2 cover?
The present invention provides a power semiconductor module, including a substrate having an electric insulating main layer being provided with a structured top metallization and with a bottom metallization, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the main layer together with its top metallization and the at l…
Who is the assignee on this patent?
Hitachi Energy Switzerland Ag
What technology area does this patent fall under?
Primary CPC classification H10W76/18. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 14 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).