Selective ground flood around reduced land pad on package base layer to enable high speed land grid array (LGA) socket

Patent metadata

Field	Value
Publication number	US-11291133-B2
Application number	US-201815938980-A
Country	US
Kind code	B2
Filing date	Mar 28, 2018
Priority date	Mar 28, 2018
Publication date	Mar 29, 2022
Grant date	Mar 29, 2022

Abstract

Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.

First claim

What is claimed is:

1. A transmission line land grid array (TL-LGA) socket assembly, comprising:
a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion, wherein the housing body has a top surface and a bottom surface that is opposite from the top surface, wherein the top surface is a conductive layer; and
a package having a base layer, the base layer includes a signal pad and a ground strip, wherein the base layer is above the conductive layer of the housing body of the TL-LGA socket, wherein the ground strip is vertically over the horizontal portion of the interconnect of the TL-LGA socket, and wherein the horizontal portion is coupled to the signal pad on the base layer.

2. The TL-LGA socket assembly of claim 1 , wherein a width of the ground strip is greater than a width of the horizontal portion, and wherein the ground strip is adjacent to the signal pad.

3. The TL-LGA socket assembly of claim 1 , further comprising a gap between the ground strip and the signal pad.

4. The TL-LGA socket assembly of claim 1 , wherein the ground strip is coupled to a ground pad on the base layer.

5. The TL-LGA socket assembly of claim 4 , wherein the ground strip is coupled to the ground pad in at least one of a longitudinal axis and an orthogonal axis, and wherein the ground strip is coupled to the ground pad in the orthogonal axis with a ground via.

6. The TL-LGA socket assembly of claim 4 , wherein the signal and ground pads on the base layer have a reduced pad area.

7. The TL-LGA socket assembly of claim 4 , wherein the base layer has a flooded ground plane, the flooded ground plane is coupled to at least one of a ground reference and the ground pad, wherein the flooded ground plane has a corresponding pad opening surrounding the signal pad on the base layer, and wherein the corresponding pad opening includes a gap between the signal pad and the corresponding pad opening.

8. The TL-LGA socket assembly of claim 1 , wherein the ground strip has a rectangular shape, and wherein the ground strip includes at least one of a rounded corner and a perpendicular corner.

9. The TL-LGA socket assembly of claim 1 , wherein the horizontal portion of the interconnect is parallel to the ground strip on the base layer to create a microstrip.

10. A package substrate, comprising:
a base layer; and
a signal pad and a ground strip on the base layer, wherein the ground strip is adjacent to the signal pad, wherein the ground strip is positioned vertically over a horizontal portion of an interconnect of a TL-LGA socket.

11. The package substrate of claim 10 , wherein the horizontal portion is coupled to the signal pad on the base layer, wherein the base layer is above a conductive layer of a housing body of the TL-LGA socket, wherein the interconnect is in the housing body, wherein the interconnect includes a vertical portion coupled to a horizontal portion, and wherein the housing body has a top surface and a bottom surface that is opposite from the top surface, and wherein the top surface is a conductive layer.

12. The package substrate of claim 11 , wherein a width of the ground strip is greater than a width of the horizontal portion.

13. The package substrate of claim 11 , wherein the horizontal portion of the interconnect of the TL-LGA socket is parallel to the ground strip on the base layer to create a microstrip.

14. The package substrate of claim 10 , further comprising a gap between the ground strip and the signal pad on the base layer.

15. The package substrate of claim 10 , further comprising a ground pad on the base layer, wherein the ground pad is coupled to the ground strip.

16. The package substrate of claim 15 , wherein the ground strip is coupled to the ground pad in at least one of a longitudinal axis and an orthogonal axis, and wherein the ground strip is coupled to the ground pad in the orthogonal axis with a ground via.

17. The package substrate of claim 15 , wherein the signal and ground pads on the base layer have a reduced pad area.

18. The package substrate of claim 15 , further comprising a flooded ground plane on the base layer, wherein the flooded ground plane is coupled to at least one of a ground reference and the ground pad, wherein the flooded ground plane has a corresponding pad opening surrounding the signal pad on the base layer, and wherein the corresponding pad opening includes a gap between the signal pad and the corresponding pad opening.

19. The package substrate of claim 10 , wherein the ground strip has a rectangular shape, and wherein the ground strip includes at least one of a rounded corner and a perpendicular corner.

20. An assembly, comprising:
a package substrate;
an integrated circuit die coupled to the package substrate, wherein the package substrate includes a base layer, wherein the base layer has a signal pad and a ground strip; and
a TL-LGA socket coupled to the package substrate, the (TL-LGA) socket including:
an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion, wherein the housing body has a top surface and a bottom surface that is opposite from the top surface, wherein the top surface is a conductive layer, wherein the base layer is above the conductive layer of the housing body of the TL-LGA socket, wherein the ground strip is vertically over the horizontal portion of the interconnect of the TL-LGA socket, and wherein the horizontal portion is coupled to the signal pad on the base layer.

21. The assembly of claim 20 , wherein a width of the ground strip is greater than a width of the horizontal portion, and wherein the ground strip is adjacent to the signal pad, and wherein the horizontal portion of the interconnect is parallel to the ground strip on the base layer to create a microstrip.

22. The assembly of claim 20 , further comprising a gap between the ground strip and the signal pad.

23. The assembly of claim 20 , wherein the ground strip is coupled to a ground pad on the base layer, and wherein the ground strip has a rectangular shape, wherein the ground strip includes at least one of a rounded corner and a perpendicular corner, wherein the ground strip is coupled to the ground pad in at least one of a longitudinal axis and an orthogonal axis, and wherein the ground strip is coupled to the ground pad in the orthogonal axis with a ground via.

24. The assembly of claim 23 , wherein the signal and ground pads on the base layer have a reduced pad area.

25. The assembly of claim 23 , wherein the base layer has a flooded ground plane, the flooded ground plane is coupled to at least one of a ground reference and the ground pad, wherein the flooded ground plane has a corresponding pad opening surrounding the signal pad on the base layer, and wherein the corresponding pad opening includes a gap between the signal pad and the corresponding pad opening.

Assignees

• Intel Corp

Inventors

• Zhang Zhichao
• Murtagian Gregorio R
• Liu Kuang C
• Aygun Kemal

Classifications

• H05K1/0253

  Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings (H05K1/0251 takes precedence) · CPC title

• H01R13/24

  resilient; resiliently-mounted · CPC title

• H05K2201/10719

  Land grid array [LGA] · CPC title

• H05K2201/093

  Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein · CPC title

• H01R12/7076

  for connection between PCB and component, e.g. display · CPC title