Fabrication method of semiconductor device

Patent metadata

Field	Value
Publication number	US-11282965-B2
Application number	US-201916959259-A
Country	US
Kind code	B2
Filing date	Jan 11, 2019
Priority date	Jan 19, 2018
Publication date	Mar 22, 2022
Grant date	Mar 22, 2022

Abstract

A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. The semiconductor device is fabricated by a method that includes a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a conductive film over the semiconductor layer, a third step of etching the conductive film such that the conductive film is divided over the semiconductor layer and a portion of the semiconductor layer is uncovered, and a fourth step of performing first treatment on the conductive film and the portion of the semiconductor layer. The conductive film contains copper, silver, gold, or aluminum. The first treatment is plasma treatment in an atmosphere containing a mixed gas of a first gas containing an oxygen element and a second gas containing a hydrogen element.

First claim

The invention claimed is:

1. A method of fabricating a semiconductor device, comprising:
a first step of forming a semiconductor layer containing a metal oxide;
a second step of forming a conductive film over the semiconductor layer;
a third step of etching the conductive film such that the conductive film is divided over the semiconductor layer and a portion of the semiconductor layer is uncovered;
a fourth step of performing first treatment on exposed top and side surfaces of the conductive film and the portion of the semiconductor layer; and
a fifth step of forming a first insulating film containing an oxide to be in contact with the conductive film and the semiconductor layer,
wherein the conductive film contains copper, silver, gold, or aluminum,
wherein the first treatment is plasma treatment in an atmosphere containing a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element and a second gas containing a hydrogen element but not containing an oxygen element,
wherein the first insulating film is formed by a plasma-enhanced chemical vapor deposition method using a film formation gas containing the first gas and a third gas containing a silicon element, and
wherein the fifth step is successively performed after the fourth step without exposure to the air.

2. The method of fabricating a semiconductor device, according to claim 1 ,
wherein the first treatment in the fourth step is performed with the flow rates of the first gas and the second gas to be supplied to a treatment chamber being controlled such that the flow rate of the second gas is 0.5% to 100% inclusive when the flow rate of the first gas is 100%.

3. The method of fabricating a semiconductor device, according to claim 1 ,
wherein the first gas contains N 2 O or O 2 , and
wherein the second gas contains NH 3 or H 2 .

4. The method of fabricating a semiconductor device, according to claim 1 ,
wherein the fourth step and the fifth step are performed in the same treatment chamber at the same temperature.

5. The method of fabricating a semiconductor device, according to claim 1 ,
wherein the semiconductor layer is formed in the first step in such a manner that a first metal oxide film and a second metal oxide film are formed in this order, and then the first metal oxide film and the second metal oxide film are processed into an island shape by etching, and
wherein the second metal oxide film is formed to have higher crystallinity than the first metal oxide film.

6. The method of fabricating a semiconductor device, according to claim 1 , further comprising:
a sixth step of forming a first conductive layer before the first step; and
a seventh step of forming a second insulating layer covering the first conductive layer between the sixth step and the first step,
wherein the semiconductor layer is formed in the first step to overlap with the first conductive layer.

7. A method of fabricating a semiconductor device, comprising:
a first step of forming a semiconductor layer containing a metal oxide;
a second step of forming a first conductive film, a second conductive film, and a third conductive film in this order over the semiconductor layer;
a third step of etching the first conductive film, the second conductive film, and the third conductive film such that the first conductive film, the second conductive film, and the third conductive film are divided over the semiconductor layer and a portion of the semiconductor layer is uncovered;
a fourth step of performing first treatment on an exposed top surface of the first conductive film, side surfaces of the first to third conductive films and the uncovered portion of the semiconductor layer; and
a fifth step of forming a first insulating film containing an oxide to be in contact with the second conductive film and the semiconductor layer,
wherein the second conductive film contains copper, silver, gold, or aluminum,
wherein the first treatment is plasma treatment in an atmosphere containing a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element and a second gas containing a hydrogen element but not containing an oxygen element,
wherein the first insulating film is formed by a plasma-enhanced chemical vapor deposition method using a film formation gas containing the first gas and a third gas containing a silicon element, and
wherein the fifth step is successively performed after the fourth step without exposure to the air.

8. The method of fabricating a semiconductor device, according to claim 7 ,
wherein the first conductive film and the third conductive film contain an element different from the second conductive film, and each independently contain any of titanium, tungsten, molybdenum, chromium, tantalum, zinc, indium, platinum, and ruthenium.

9. The method of fabricating a semiconductor device, according to claim 2 ,
wherein the first treatment in the fourth step is performed with the flow rates of the first gas and the second gas to be supplied to a treatment chamber being controlled such that the flow rate of the second gas is 0.5% to 100% inclusive when the flow rate of the first gas is 100%.

10. The method of fabricating a semiconductor device, according to claim 7 ,
wherein the first gas contains N 2 O or O 2 , and
wherein the second gas contains NH 3 or H 2 .

11. The method of fabricating a semiconductor device, according to claim 7 ,
wherein the fourth step and the fifth step are performed in the same treatment chamber at the same temperature.

12. The method of fabricating a semiconductor device, according to claim 7 ,
wherein the semiconductor layer is formed in the first step in such a manner that a first metal oxide film and a second metal oxide film are formed in this order, and then the first metal oxide film and the second metal oxide film are processed into an island shape by etching, and
wherein the second metal oxide film is formed to have higher crystallinity than the first metal oxide film.

13. The method of fabricating a semiconductor device, according to claim 7 , further comprising:
a sixth step of forming a first conductive layer before the first step; and
a seventh step of forming a second insulating layer covering the first conductive layer between the sixth step and the first step,
wherein the semiconductor layer is formed in the first step to overlap with the first conductive layer.

Assignees

• Semiconductor Energy Lab

Inventors

• Nakazawa Yasutaka
• Hamochi Takashi
• Ohide Takayuki
• Okazaki Kenichi

Classifications

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10P14/22

  using physical deposition, e.g. vacuum deposition or sputtering · CPC title

• H10D64/011

  of electrodes ohmically coupled to a semiconductor · CPC title