Devices with three-dimensional structures and support elements to increase adhesion to substrates

Patent metadata

Field	Value
Publication number	US-11276658-B2
Application number	US-202016987223-A
Country	US
Kind code	B2
Filing date	Aug 6, 2020
Priority date	Jun 20, 2018
Publication date	Mar 15, 2022
Grant date	Mar 15, 2022

Abstract

Methods of forming supports for 3D structures on semiconductor structures comprise forming the supports from photodefinable materials by deposition, selective exposure and curing. Semiconductor dice including 3D structures having associated supports, and semiconductor devices are also disclosed.

First claim

What is claimed is:

1. A device, comprising:
at least one semiconductor die having bond pads on an active surface thereof;
a first group of 3D structures comprising metal pillars on and in contact with the bond pads;
a second group of 3D structures comprising metal pillars entirely on and in contact with a passivation material over the active surface; and
support elements abutting at least some 3D structures of the second group of 3D structures and adhered at least to the passivation material.

2. The device of claim 1 , wherein the support elements comprise a cured photodefinable material adhered to the metal pillars and to the passivation material.

3. The device of claim 2 , wherein the cured photodefinable material comprises a dielectric material selected from the group consisting of polyimides, epoxies, polybenzoxazole, and bezocyclobutene.

4. The device of claim 1 , wherein the at least one semiconductor die comprises two or more semiconductor dice, and the first and second groups of 3D structures of each of the two or more semiconductor dice are in contact with a mutually adjacent semiconductor die, an interposer, or a carrier substrate.

5. The device of claim 4 , wherein the second groups of 3D structures of all of the two or more semiconductor dice are aligned.

6. The device of claim 4 , wherein the second groups of 3D structures of each of the two or more semiconductor dice are laterally offset from the second groups of 3D structures of semiconductor dice adjacent thereunto.

7. The device of claim 1 , further comprising support elements abutting at least some 3D structures of the first group of 3D structures and adhered at least to the passivation material.

8. The device of claim 1 , wherein the support elements have a substantially frustoconical shape.

9. The device of claim 1 , where the first group of 3D structures comprise a material and the second group of 3D structures comprise the material.

10. The device of claim 1 , wherein the second group of 3D structures are arranged on an area of the active surface associated with higher power consumption than another area of the active surface.

11. The device of claim 1 , wherein at least one of the second group of 3D structures has a different shape than at least one of the first group of 3D structures.

12. The device of claim 1 , wherein at least one of the second group of 3D structures has a different size than at least one of the first group of 3D structures.

13. The device of claim 1 , wherein the second group of 3D structures is arranged proximate to an edge of the semiconductor die.

14. A device, comprising:
a semiconductor substrate comprising bond pads on a major surface of the semiconductor substrate and a passivation material on the major surface;
at least one conductive element comprising a pillar on the passivation material and electrically isolated from the bond pads; and
a support element comprising a cured photodefinable material surrounding and in contact with the pillar and adhered to the pillar and the passivation material.

15. The device of claim 14 , wherein the at least one conductive element comprising a pillar comprises at least one first conductive element comprising a first pillar, the device further comprising at least one second conductive element comprising a second pillar, the second pillar adhered to at least a portion of a bond pad of the bond pads.

16. The device of claim 14 , wherein the cured photodefinable material comprises a dielectric material selected from the group consisting of polyimides, epoxies, polybenzoxazole, and bezocyclobutene.

17. The device of claim 14 , wherein the support elements have a substantially frustoconical shape.

18. A device comprising:
a first semiconductor die comprising:
a first pillar on a first major surface of the first semiconductor die, the first pillar electrically isolated from underlying integrated circuitry of the first semiconductor die; and
a support element comprising a cured photodefinable material surrounding and in contact with the first pillar and adhered to the first pillar and the first major surface of the first semiconductor die; and

a second semiconductor die stacked above the first semiconductor die, a second major surface of the second semiconductor die in contact with the first pillar.

19. The device of claim 18 , wherein the second semiconductor die comprises a second pillar on the second major surface, and wherein the first pillar is laterally offset from second pillar.

Assignees

• Micron Technology Inc

Inventors

• Gambee Christopher J
• Doan Nhi
• Tiwari Chandra S
• Fay Owen R
• Chen Ying

Classifications

• H10W72/222

  Multilayered bumps, e.g. a coating on top and side surfaces of a bump core · CPC title

• H10W72/012

  of bump connectors, dummy bumps or thermal bumps · CPC title

• H10W72/01215

  forming coatings · CPC title

• H10W74/147

  the encapsulations being multilayered · CPC title

• H10W74/137 Primary

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title