Stacked semiconductor dies including inductors and associated methods
US-10217726-B1 · Feb 26, 2019 · US
US11239177B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11239177-B2 |
| Application number | US-202016884777-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 27, 2020 |
| Priority date | Nov 9, 2017 |
| Publication date | Feb 1, 2022 |
| Grant date | Feb 1, 2022 |
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A semiconductor package includes a package substrate including a die attachment region, a semiconductor die attached to the die attachment region, and a die over-shift indicating pattern disposed on or in the package substrate and spaced apart from the die attachment region. The die over-shift indicating pattern is used as a reference pattern for obtaining a shifted distance of the semiconductor die.
Opening claim text (preview).
What is claimed is: 1. A semiconductor package comprising: a package substrate including a die attachment region; a first semiconductor die attached to the die attachment region; a second semiconductor die stacked on the first semiconductor die and offset from the first semiconductor die; and a die over-shift indicating pattern disposed in the package substrate and spaced apart from the die attachment region, wherein the die over-shift indicating pattern is used as a reference pattern for obtaining a shifted distance of the second semiconductor die, wherein the die over-shift indicating pattern is configured to detect whether the shifted distance of the second semiconductor die is greater than an allowable range, and wherein the die over-shift indicating pattern is disposed such that at least a portion of the die over-shift indicating pattern is covered by the second semiconductor die when the shifted distance is greater than the allowable range. 2. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern includes a line-shaped pattern which is parallel with a line at the side of the die attachment region. 3. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern includes two line-shaped patterns which are spaced apart from each other and are parallel with each other. 4. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern is a groove-shaped pattern that is engraved at a surface of the package substrate. 5. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern protrudes from a surface of the package substrate. 6. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern is located at substantially the same level as interconnection patterns formed in the package substrate.
for supporting or gripping · CPC title
Package configurations · CPC title
the substrate having spherical bumps for external connection · CPC title
Alignment aids, e.g. alignment marks · CPC title
Interconnections or connectors in packages · CPC title
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