Method for forming semiconductor device structure with fine line pitch and fine end-to-end space

Patent metadata

Field	Value
Publication number	US-11217458-B2
Application number	US-202016895525-A
Country	US
Kind code	B2
Filing date	Jun 8, 2020
Priority date	Mar 12, 2015
Publication date	Jan 4, 2022
Grant date	Jan 4, 2022

Abstract

A method for forming a semiconductor device structure is provided. The method includes providing a substrate and forming a bottom layer, a middle layer, and a top layer on the substrate. The method also includes patterning the top layer to form a patterned top layer and patterning the middle layer by a patterning process including a plasma process to form a patterned middle layer. The plasma process is performed by using a mixed gas including hydrogen gas (H2). The method further includes controlling a flow rate of the hydrogen gas (H2) to improve an etching selectivity of the middle layer to the top layer, and the patterned middle layer includes a first portion and a second portion parallel to the first portion, and a pitch is between the first portion and the second portion.

First claim

What is claimed is:

1. A method comprising:
forming a tri-layer mask over a substrate;
forming an opening in a top layer of the tri-layer mask; and
performing a plasma process on the top layer and a middle layer of the tri-layer mask, wherein the plasma process is performed using a mixed gas comprising molecular hydrogen gas (H 2 ), and wherein performing the plasma process comprises:
extending, using a plasma generated from the mixed gas, the opening into the middle layer of the tri-layer mask to form an extended opening;
increasing an etching selectivity of the middle layer relative to the top layer by controlling a flow rate of the molecular hydrogen gas (H 2 ); and
depositing, using the plasma generated from the mixed gas, a protection layer on sidewalls and a bottom of the extended opening, wherein the protection layer comprises C x H y F z , and wherein each of x, y and z is greater than zero.

2. The method of claim 1 , further comprising performing an etch process on a bottom layer of the tri-layer mask by using the middle layer of the tri-layer mask as a mask.

3. The method of claim 1 , wherein performing the plasma process further comprises reducing a roughness of a sidewall of the opening.

4. The method of claim 1 , wherein the flow rate of the molecular hydrogen gas (H 2 ) is between about 0.1 sccm to about 300 sccm.

5. The method of claim 1 , wherein the etching selectivity of the middle layer of the tri-layer mask relative to the top layer of the tri-layer mask is between about 1.2 to about 100.

6. The method of claim 1 , wherein a volume ratio of the molecular hydrogen gas (H 2 ) to the mixed gas is between about 3 vol % and about 60 vol %.

7. The method of claim 1 , wherein the mixed gas further comprises a fluorine-containing gas.

8. The method of claim 7 , wherein the mixed gas further comprises an inert gas.

9. A method comprising:
forming a hard mask layer over a dielectric layer; forming a bottom layer, a middle layer, and a top layer on the hard mask layer; patterning the top layer to form a patterned top layer; and performing a plasma process on the patterned top layer and the middle layer, wherein the plasma process is performed using a mixed gas comprising hydrogen gas (H 2 ), and wherein performing the plasma process comprises: reducing a line width roughness (LWR) of the patterned top layer; patterning the middle layer to form a patterned middle layer; and depositing a protection film on sidewalls of the patterned top layer and sidewalls of the patterned middle layer, wherein the protection layer comprises C x H y F z , and wherein each of x, y and z is greater than zero.

10. The method of claim 9 , further comprising:
patterning the bottom layer by using the patterned middle layer as a mask to form a patterned bottom layer; and
patterning the hard mask layer by using the patterned top layer, the patterned middle layer, and the patterned bottom layer as a mask to form a patterned hard mask layer.

11. The method of claim 9 , wherein, after performing the plasma process, the LWR of the patterned top layer is between about 2 nm and about 4 nm.

12. The method of claim 9 , wherein performing the plasma process further comprises increasing an etching selectivity of the middle layer relative to the top layer by controlling a flow rate of the hydrogen gas (H 2 ).

13. The method of claim 9 , wherein the bottom layer comprises an anti-reflective coating (BARC) layer.

14. The method of claim 9 , wherein the top layer comprises a photoresist material.

15. A method comprising:
forming a dielectric layer over a substrate; forming a hard mask layer over the dielectric layer; forming a bottom layer, a middle layer, and a top layer on the hard mask layer; patterning the top layer to form a patterned top layer; and performing a plasma process on the patterned top layer and the middle layer, wherein the plasma process is performed using a mixed gas comprising hydrogen gas (H 2 ), and wherein performing the plasma process comprises; etching the middle layer to form a patterned middle layer; increasing an etching selectivity of the middle layer relative to the top layer by controlling a flow rate of the hydrogen gas (H 2 ); and depositing a protection film on sidewalls of the patterned top layer and sidewalls of the patterned middle layer, wherein the protection layer comprises C x H y F z , and wherein each of x, y and z is greater than zero.

16. The method of claim 15 , further comprising:
etching the bottom layer by using the patterned middle layer as a mask to form a patterned bottom layer; and
etching the hard mask layer by using the patterned top layer, the patterned middle layer, and the patterned bottom layer as a mask to form a patterned hard mask layer.

17. The method of claim 15 , wherein performing the plasma process further comprises reducing a line width roughness (LWR) of the patterned top layer.

18. The method of claim 15 , wherein the etching selectivity of the middle layer relative to the top layer is between about 1.2 to about 100.

19. The method of claim 15 , wherein a thickness of the middle layer is less than a thickness of the top layer and a thickness of the bottom layer.

20. The method of claim 9 , wherein the middle layer comprises a silicon-based material.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Hung-Hao
• Chen Yu-Shu
• Liu Yu-Cheng

Classifications

• H10P76/204

  of organic photoresist masks · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/71

  using masks for conductive or resistive materials · CPC title

• H10W20/47

  comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title

• H10W20/088

  involving partial etching of via holes · CPC title