Switching element, variable resistance memory device, and method of manufacturing the switching element

US11211427B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11211427-B2
Application numberUS-201916386893-A
CountryUS
Kind codeB2
Filing dateApr 17, 2019
Priority dateSep 13, 2018
Publication dateDec 28, 2021
Grant dateDec 28, 2021

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Abstract

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A switching element includes a lower barrier electrode disposed on a substrate, a switching pattern disposed on the lower barrier electrode, and an upper barrier electrode disposed on the switching pattern. The switching pattern includes a first switching pattern, and a second switching pattern disposed on the first switching pattern and having a density different from a density of the first switching pattern.

First claim

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What is claimed is: 1. A method of manufacturing a switching element, the method comprising: forming a lower barrier layer on a substrate; forming a switching layer on the lower barrier layer, using a sputtering method; forming an upper barrier layer on the switching layer; and removing portions of the lower barrier layer, the switching layer and the upper barrier layer to form the switching element, wherein the forming of the switching layer comprises: forming a first switching layer having a plurality of first voids formed by the sputtering method; and forming a second switching layer on the first switching layer, the second switching layer having a plurality of second voids fewer than the plurality of first voids, and wherein the second switching layer has a density different from a density of the first switching layer. 2. The method of claim 1 , wherein the first switching layer comprises a first inert gas in the plurality of first voids, and wherein the second switching layer comprises a second inert gas different from the first inert gas in the plurality of second voids. 3. The method of claim 2 , wherein the first inert gas comprises an argon gas, and wherein the second inert gas comprises any one or any combination of a krypton gas, a xenon gas, and a radon gas. 4. The method of claim 2 , wherein the forming of the switching layer further comprises forming a third switching layer on the second switching layer by using the first inert gas. 5. A method of manufacturing a switching element, the method comprising: forming a lower barrier layer on a substrate; forming a switching layer on the lower barrier layer, using a sputtering method; and forming an upper barrier layer on the switching layer, wherein the forming of the switching layer comprises: forming a first switching layer having a plurality of first voids formed by the sputtering method; and forming a second switching layer on the first switching layer, the second switching layer having a plurality of second voids fewer than the plurality of first voids, and wherein the second switching layer comprises a Kr gas in the plurality of second voids. 6. The method of claim 5 , wherein the first switching layer comprises an Ar gas in the plurality of first voids. 7. The method of claim 6 , wherein the first switching layer and the second switching layer are a lower density switching layer and a high density switching layer, respectively. 8. A method of manufacturing a switching element, the method comprising: forming a lower barrier layer on a substrate; forming a switching layer on the lower barrier layer, using a sputtering method; and forming an upper barrier layer on the switching layer, wherein the switching layer comprises a plurality of voids formed by the sputtering method and Kr gas in the plurality of voids. 9. The method of claim 8 , wherein the switching layer further comprises Xe gas or Rn gas in the plurality of voids. 10. The method of claim 8 , wherein the switching layer further comprises Ar gas in the plurality of voids.

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What does patent US11211427B2 cover?
A switching element includes a lower barrier electrode disposed on a substrate, a switching pattern disposed on the lower barrier electrode, and an upper barrier electrode disposed on the switching pattern. The switching pattern includes a first switching pattern, and a second switching pattern disposed on the first switching pattern and having a density different from a density of the first sw…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/2427. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 28 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).