Tunneling metamagnetic resistance memory device and methods of operating the same

Patent metadata

Field	Value
Publication number	US-11200934-B2
Application number	US-202016853407-A
Country	US
Kind code	B2
Filing date	Apr 20, 2020
Priority date	Apr 20, 2020
Publication date	Dec 14, 2021
Grant date	Dec 14, 2021

Abstract

A magnetoresistive memory device includes a first electrode, a second electrode, and a layer stack located between the first electrode and the second electrode. The layer stack may include a ferroelectric material layer and a metamagnetic tunnel junction containing a metamagnetic material layer, an insulating barrier layer, and a metallic material layer. Alternatively, the layer stack may include a multiferroic material layer, the metamagnetic material layer, the insulating barrier layer, and a reference magnetization layer.

First claim

What is claimed is:

1. A magnetoresistive memory device, comprising:
a first electrode;
a second electrode; and
a layer stack located between the first electrode and the second electrode, the layer stack comprising a ferroelectric material layer and a metamagnetic tunnel junction, wherein the metamagnetic tunnel junction comprises:
a metamagnetic material layer;
a metallic material layer;
an insulating barrier layer between the metallic material layer and the metamagnetic material layer; and

at least one feature comprising:
(a) a first feature wherein the metamagnetic material layer contacts the ferroelectric material layer and the insulating barrier layer and wherein the metamagnetic tunnel junction has different tunneling magnetoresistance between a first state in which the metamagnetic material layer is in the non-magnetic state and a second state in which the metamagnetic material layer is in the magnetic state; or
(b) a second feature wherein:
the ferroelectric material layer comprises two bistable polarization directions;
alignment of the non-zero electric polarization along one of the two bistable polarization directions induces the magnetic state in the metamagnetic material layer; and
alignment of the non-zero electric polarization along another of the two bistable polarization directions induces the non-magnetic state in the metamagnetic material layer;

or
(c) a third feature wherein the metallic material layer comprises a non-magnetic metallic material; or
(d) a fourth feature wherein the ferroelectric material layer comprises a material selected from hafnium oxide, zirconium oxide, hafnium-zirconium oxide, bismuth ferrite, barium titanate, colemanite, bismuth titanate, europium barium titanate, ferroelectric polymer, germanium telluride, langbeinite, lead scandium tantalate, lead titanate, lead zirconate titanate, lithium niobite, lanthanum aluminum oxide, polyvinylidene fluoride, potassium niobate, potassium sodium tartrate, potassium titanyl phosphate, sodium bismuth titanate, lithium tantalate, lead lanthanum titanate, lead lanthanum zirconate titanate, ammonium dihydrogen phosphate, or potassium dihydrogen phosphate; or
(e) a fifth feature wherein the metamagnetic material layer comprises a material selected from Co, a FeRh alloy, an EuSe alloy, CrO 2 , or LaSrMnO 3 ; or
(f) a sixth feature wherein the insulating barrier layer comprises a material selected from magnesium oxide, aluminum oxide, strontium titanate or a combination thereof; or
(g) a seventh feature comprising a programming circuit that is configured:
to apply a first programming pulse of a first polarity between the first electrode and the second electrode to program the metamagnetic material layer into the magnetic state; and
to apply a second programming pulse of a second polarity that is an opposite of the first polarity between the first electrode and the second electrode to program the metamagnetic material layer into the non-magnetic state.

2. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprises the first feature.

3. The magnetoresistive memory device of claim 2 , wherein the metamagnetic material has a variable surface density of states at an interface with the insulating barrier layer that changes between the non-magnetic state of the metamagnetic material and the magnetic state of the metamagnetic material.

4. The magnetoresistive memory device of claim 3 , wherein:
the magnetic state of the metamagnetic material layer comprises a ferromagnetic state, a ferrimagnetic state, or an antiferromagnetic state; and
the non-magnetic state of the metamagnetic material layer comprises a paramagnetic state of a diamagnetic state.

5. The magnetoresistive memory device of claim 3 , wherein the metamagnetic tunnel junction has a variable tunneling resistance that increases with a decrease in the variable surface density of states of the metamagnetic material at the interface with the insulating barrier layer.

6. The magnetoresistive memory device of claim 3 , wherein:
the metamagnetic material layer has a first surface density of states in the magnetic state; and
the metamagnetic material layer has a second surface density of states in the non-magnetic state which is different from the first surface density of states.

7. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprise the second feature.

8. The magnetoresistive memory device of claim 7 , wherein the two bistable polarization directions are at a non-zero angle with respective to an interface between the ferroelectric material layer and the metamagnetic material layer.

9. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprise the third feature.

10. The magnetoresistive memory device of claim 1 , wherein the metallic material comprises Cu, Cr, Ti, Ta, Au or Ru.

11. The magnetoresistive memory device of claim 10 , wherein the second electrode comprises a Ru or Ta capping layer located on the metallic material layer.

12. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprise the fourth feature.

13. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprise the fifth feature.

14. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprise the sixth feature.

15. The magnetoresistive memory device of claim 1 , wherein the at least one feature comprise the seventh feature.

16. A magnetoresistive random access memory device, comprising:
a two-dimensional array of instances of a magnetoresistive memory device comprising:
a first electrode;
a second electrode; and
a layer stack located between the first electrode and the second electrode, the layer stack comprising a ferroelectric material layer and a metamagnetic tunnel junction, wherein the metamagnetic tunnel junction comprises:
a metamagnetic material layer;
a metallic material layer; and
an insulating barrier layer between the metallic material layer and the metamagnetic material layer; and

word lines electrically connected to a respective subset of the first electrodes of the two-dimensional array;
bit lines electrically connected to a respective subset of the second electrodes of the two-dimensional array; and
a programming circuit connected to the bit lines and the word lines and configured to program the magnetoresistive memory device.

17. A method of operating a magnetoresistive memory device comprising:
a first electrode;
a second electrode; and
a layer stack located between the first electrode and the second electrode, the layer stack comprising a ferroelectric material layer and a metamagnetic tunnel junction, wherein the metamagnetic tunnel junction comprises:
a metamagnetic material layer;
a metallic material layer; and
an insulating barrier layer between the metallic material layer and the metamagnetic material layer;

the method comprising:
applying a first polarity programming voltage to the first electrode relative to the second electrode in a first programming step to switch a state of the metamagnetic material layer from the non-magnetic state to the magnetic state; and
applying a second polarity programming voltage having an opposite polarity of the first polarity programming voltage to the first electrode relative to the second electrode in a second programming step to switch the state of the metamagnetic material layer from the magnetic state to the non-magnetic state.

18. The method of claim 17 , wh

Assignees

• Western Digital Tech Inc

Inventors

• Prasad Bhagwati
• Kalitsov Alan

Classifications

• H10N50/85

  Materials of the active region · CPC title

• G11C11/161 Primary

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/1655

  Bit-line or column circuits · CPC title

• G11C11/1657

  Word-line or row circuits · CPC title

• H01L43/02

  Electricity · mapped topic