Plasmonic avalanche photodetection
US-10612971-B2 · Apr 7, 2020 · US
US11133758B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11133758-B2 |
| Application number | US-202016855890-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 22, 2020 |
| Priority date | May 10, 2019 |
| Publication date | Sep 28, 2021 |
| Grant date | Sep 28, 2021 |
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Described herein are devices incorporating Casimir cavities, which modify the quantum vacuum mode distribution within the cavities. The Casimir cavities can drive charge carriers from or to an electronic device disposed adjacent to or contiguous with the Casimir cavity by modifying the quantum vacuum mode distribution incident on one side of the electronic device to be different from the quantum vacuum mode distribution incident on the other side of the electronic device. The electronic device can exhibit a structure that permits transport or capture of hot carriers in very short time intervals, such as in 1 picosecond or less.
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What is claimed is: 1. A device comprising: an electronic device; and a zero-point-energy-density-reducing structure adjoining the electronic device, the zero-point-energy-density-reducing structure providing an asymmetry with respect to the electronic device that drives a flow of energy across the electronic device. 2. The device of claim 1 , wherein at least a portion of the electronic device comprises a component of the zero-point-energy-density-reducing structure. 3. The device of claim 1 , wherein the asymmetry produces a net charge flow between a first side of the electronic device and a second side of the electronic device. 4. The device of claim 1 , wherein the asymmetry provides a reduction in a zero-point energy density on a first side of the electronic device as compared to the zero-point energy density on the first side of the electronic device in an absence of the zero-point-energy-density-reducing structure. 5. The device of claim 1 , wherein the asymmetry provides a difference between a first zero-point energy density on a first side of the electronic device and a second zero-point energy density on a second side of the electronic device that drives the flow of energy. 6. The device of claim 1 , wherein a first side of the electronic device corresponds to at least a part of a first conductive layer of the electronic device, and wherein a second side of the electronic device corresponds to at least a part of a second conductive layer of the electronic device. 7. The device of claim 1 , wherein the electronic device exhibits a structure that permits transport or capture of charge carriers that pass through the electronic device in 1 ps or less. 8. The device of claim 1 , wherein the flow of energy occurs even in the absence of external sources of illumination. 9. The device of claim 1 , wherein the zero-point-energy-density-reducing structure comprises a Casimir cavity adjoining the electronic device. 10. The device of claim 9 , wherein the electronic device comprises: a first conductive layer comprising a component of the Casimir cavity; a transport layer disposed adjacent to and in contact with the first conductive layer; and a second conductive layer disposed adjacent to and in contact with the transport layer. 11. The device of claim 10 , wherein the first conductive layer comprises a metal. 12. The device of claim 10 , wherein the transport layer comprises a dielectric. 13. The device of claim 10 , wherein the transport layer comprises a semiconductor. 14. The device of claim 10 , wherein the first conductive layer has a thickness of from 3 nm to 100 nm. 15. The device of claim 10 , wherein the transport layer has a thickness of from 0.3 nm to 50 nm. 16. The device of claim 10 , wherein the second conductive layer has a thickness of from 5 nm to 1 cm. 17. The device of claim 10 , wherein at least one of the first conductive layer or the second conductive layer comprises a multilayer structure including one or more conductive sub-layers. 18. The device of claim 10 , wherein the first conductive layer includes a metamaterial that enhances an optical absorption character of the first conductive layer. 19. The device of claim 10 , wherein the first conductive layer includes a metamaterial that enhances hot carrier emission. 20. The device of claim 9 , wherein the Casimir cavity comprises: a first reflective layer; a cavity layer; and a second reflective layer, wherein the cavity layer is between the first reflective layer and the second reflective layer. 21. The device of claim 20 , wherein the cavity layer has a thickness of from 10 nm to 2 μm. 22. The device of claim 20 , wherein the cavity layer comprises a condensed-phase optically transparent material layer. 23. The device of claim 20 , wherein the cavity layer comprises a material having a transmittance of greater than 20% for at least some wavelengths of electromagnetic radiation from 100 nm to 10 μm. 24. The device of claim 20 , wherein the first reflective layer has a thickness of from 10 nm to 1 cm. 25. The device of claim 20 , wherein a reflectivity of at least one of the first reflective layer or the second reflective layer is greater than 50%. 26. The device of claim 20 , wherein the first reflective layer comprises a metal. 27. The device of claim 20 , wherein the second reflective layer comprises one or more components of the electronic device. 28. The device of claim 1 , wherein the electronic device comprises a diode. 29. The device of claim 1 , wherein the electronic device comprises a conductive layer adjoining the zero-point-energy-density-reducing structure and a semiconductor layer disposed adjacent to and in contact with the conductive layer. 30. The device of claim 1 , further comprising a load positioned to receive electric current from one or more electrically conductive layers of the electronic device. 31. The device of claim 1 , further comprising a substrate, wherein the zero-point-energy-density-reducing structure is disposed adjacent to and supported by the substrate. 32. The device of claim 1 , further comprising a substrate, wherein the electronic device is disposed adjacent to and supported by the substrate. 33. A device array comprising: a plurality of devices of claim 1 arranged in an array configuration. 34. The device array of claim 33 , wherein at least a subset of the plurality of devices are arranged in a series configuration. 35. The device array of claim 33 , wherein at least a subset of the plurality of devices are arranged in a parallel configuration. 36. The device array of claim 33 , wherein the plurality of devices are arranged in a combination of series and parallel configurations. 37. A device stack comprising: a plurality of device layers arranged in a stacked configuration, wherein each device layer comprises one or more devices of claim 1 . 38. The device stack of claim 37 , wherein each device layer corresponds to an array comprising a plurality of the devices. 39. A device comprising: an electronic device; and a zero-point-energy-density-reducing structure adjoining the electronic device, wherein the electronic device exhibits a structure that permits transport or capture of charge carriers that pass through the electronic device in 1 ps or less. 40. The device of claim 39 , wherein the structure permits transport or capture of the charge carriers in 100 fs or less. 41. The device of claim 39 , wherein the zero-point-energy-density-reducing structure provides an asymmetry with respect to the electronic device that drives a flow of energy across the electronic device. 42. The device of claim 41 , wherein the asymmetry produces a net charge flow between a first side of the electronic device and a second side of the electronic device. 43. The device of claim 41 , wherein the asymmetry provides a reduction in a zero-point energy density on a first side of the electronic device as compared to the zero-point energy density on the first side of the electronic device in an absence of the zero-point-energy-density-reducing structur
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