Semiconductor device and electronic equipment

Patent metadata

Field	Value
Publication number	US-9634158-B2
Application number	US-201314374720-A
Country	US
Kind code	B2
Filing date	Jan 25, 2013
Priority date	Feb 3, 2012
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

The present technology relates to a semiconductor device and electronic equipment in which a semiconductor device that suppresses the occurrence of noise by a leakage of light can be provided.
A semiconductor device is configured which includes a light-receiving element 34 , an active element for signal processing, and a light shielding structure 40 which is between the light-receiving element 34 and the active element to cover the active element and is formed of wirings 45 and 46 . The semiconductor device further includes a first substrate on which the light-receiving element is formed, a second substrate on which the active element is formed, and a wiring layer which has a light shielding structure by the wirings which is formed on the second substrate, and in which the second substrate can be bonded to the first substrate through the wiring layer.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a light-receiving element in a first semiconductor substrate;
an active element in a second semiconductor substrate stacked on the first semiconductor substrate in a first direction for signal processing;
a light shielding structure which is between the light-receiving element and the active element in the second semiconductor substrate; and
buffer zones on both sides of the active element, wherein a width of the buffer zones are wider than a distance from the active element to the light shielding structure,
wherein, in a cross-sectional view, the light shielding structure includes a first wiring and a second wiring arranged in a second direction in a first wiring layer and a third wiring in a second wiring layer,
an inter-wiring region disposed between the first wiring and the second wiring, and above the active element,
the third wiring arranged at a position in which the third wiring overlaps the inter-wiring region, a first side edge of the first wiring and a first side edge of the second wiring in the second direction, a width of the third wiring is wider than a width of the inter-wiring region in the second direction, and
a width from a second side edge of the first wiring to a second side edge of the second wiring is wider than the width of the third wiring and wider than a width of the active element in the second direction.

2. The semiconductor device according to claim 1 , wherein the second semiconductor substrate is bonded to the first semiconductor substrate through the light shielding structure.

3. The semiconductor device according to claim 2 , wherein an origin of the second wiring is from a branch point of the first wiring and the light shielding structure has a portion of the first wiring and a portion of the second wiring which are parallel to each other.

4. The semiconductor device according to claim 1 ,
wherein the active element of the second semiconductor substrate is divided into a plurality of circuit blocks,
wherein a region that corresponds to a circuit block of the plurality of circuit blocks is defined as a light shielding target region, and
wherein a region between the plurality of circuit blocks is defined as a light shielding non-target region.

5. The semiconductor device according to claim 1 , wherein the light-receiving element is a photoelectric conversion element.

6. The semiconductor device according to claim 1 , wherein the light-receiving element is a high sensitivity analog element with a high sensitivity to light noises.

7. An electronic equipment, comprising:
a semiconductor device including:
a light-receiving element in a first semiconductor substrate;
an active element in a second semiconductor substrate stacked on the first semiconductor substrate in a first direction for signal processing;
a light shielding structure which is between the light-receiving element and the active element in the second semiconductor substrate; and
buffer zones on both sides of the active element, wherein a width of the buffer zones are wider than a distance from the active element to the light shielding structure,
wherein, in a cross-sectional view, the light shielding structure includes a first wiring and a second wiring arranged in a second direction in a first wiring layer and a third wiring in a second wiring layer,
an inter-wiring region disposed between the first wiring and the second wiring, and above the active element,
the third wiring arranged at a position in which the third wiring overlaps the inter-wiring region, a first side edge of the first wiring and a first side edge of the second wiring in the second direction, a width of the third wiring is wider than a width of the inter-wiring region in the second direction, and
a width from a second side edge of the first wiring to a second side edge of the second wiring is wider than the width of the third wiring and wider than a width of the active element in the second direction.

8. A semiconductor device, comprising:
a layer of lower wirings in a light shielding structure;
a layer of upper wirings in the light shielding structure, wherein an inter-wiring distance in a first direction in a cross-sectional view of the light shielding structure is a gap between said layer of the lower wirings and said layer of the upper wirings;
a first active element in a first light shielding target region of a semiconductor substrate; and
buffer zones on both sides of the first active element, wherein a width of the buffer zones are wider than a distance from the first active element to the light shielding structure,
wherein a first wiring of the upper wirings overlays a first portion of a first wiring of the lower wirings and a second wiring of the upper wirings overlays a second portion of the first wiring of the lower wirings in the cross-sectional view, and
wherein a width of the first wiring of the lower wirings is wider than a width between the first wiring of the upper wirings and the second wiring of the upper wirings in the second direction in the cross-sectional view.

9. The semiconductor device according to claim 8 , wherein said first wiring of the upper wirings overlays said first portion of the first wiring of the lower wirings by an amount of overlap, the amount of overlap is at least greater than the inter-wiring distance.

10. The semiconductor device according to claim 8 , wherein in the cross-sectional view of the light shielding structure, an insulation is between said first wiring of the upper wirings and said second wiring of the upper wirings.

11. The semiconductor device according to claim 8 , wherein an opening width in the cross-sectional view is a gap between the first wiring of the lower wirings and a second wiring of the lower wirings.

12. The semiconductor device according to claim 8 , further comprising:
a light-receiving element between an optical member and said layer of the upper wirings.

13. The semiconductor device according to claim 12 , wherein the light-receiving element is a photodiode.

14. The semiconductor device according to claim 8 ,
wherein said layer of the lower wirings is between the first active element and said layer of the upper wirings.

15. The semiconductor device according to claim 14 , wherein a light shielding non-target region of the semiconductor substrate is between the first light shielding target region and a second light shielding target region of the semiconductor substrate.

16. The semiconductor device according to claim 15 , further comprising:
a second active element in the second light shielding target region.

17. The semiconductor device according to claim 15 , wherein an interlayer distance is a length from the first active element to the light shielding structure and a buffer zone width is a distance from the first active element to the light shielding non-target region, the buffer zone width is larger than the interlayer distance.

18. An electronic equipment, comprising:
a semiconductor device that includes:
a layer of lower wirings in a light shielding structure;
a layer of upper wirings in the light shielding structure,
wherein an inter-wiring distance in a first direction in a cross-sectional view of the light shielding structure is a gap between said layer of the lower wirings and said layer of the upper wirings;

an active element in a light shielding target region of a semiconductor substrate; and
buffer zones on both sides of the active element, wherein a width of the buffer zones are wider than a distan

Assignees

• Sony Corp

Inventors

• Kobayashi Shoji
• Kudoh Yoshiharu
• Sano Takuya

Classifications

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H01L27/1464

  Electricity · mapped topic