Method of post-deposition treatment for silicon oxide film

US11081345B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11081345-B2
Application numberUS-201815890037-A
CountryUS
Kind codeB2
Filing dateFeb 6, 2018
Priority dateFeb 6, 2018
Publication dateAug 3, 2021
Grant dateAug 3, 2021

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A method of post-deposition treatment for silicon oxide film includes: providing in a reaction space a substrate having a recess pattern on which a silicon oxide film is deposited; supplying a reforming gas for reforming the silicon oxide film to the reaction space in the absence of a film-forming precursor, said reforming gas being composed primarily of He and/or H 2 ; and irradiating the reforming gas with microwaves in the reaction space having a pressure of 200 Pa or less to generate a direct microwave plasma to which the substrate is exposed, thereby reforming the silicon oxide film.

First claim

Opening claim text (preview).

I claim: 1. A method of post-deposition treatment for silicon oxide film, which is conducted only after stopping all deposition processes of the silicon oxide film and comprises: (i) providing in a reaction space a substrate on which the silicon oxide film is deposited; (ii) supplying a reforming gas for reforming the silicon oxide film to the reaction space in the absence of a film-forming precursor, said reforming gas being composed primarily of He and/or H 2 ; and (iii) irradiating the reforming gas with microwaves for 1 to 10 minutes in the reaction space having a pressure of 30 Pa or less and a temperature of 300° C. or lower to generate a direct microwave plasma to which the substrate is exposed, thereby reforming the silicon oxide film in depth within a range from its surface to 5 nm, wherein the microwaves have a frequency of 800 MHz or higher, wherein step (iii) continues until hydrogen is desorbed and released from the silicon oxide film, without additional annealing and without increasing a thickness of the oxide film, to a desired depth of the oxide film. 2. The method according to claim 1 , wherein the substrate has a recess pattern, each recess having a top surface, a sidewall, and a bottom, on which the silicon oxide film is deposited so as to form a top layer on the top surface, a side layer on the sidewall, and a bottom layer on the bottom, wherein in step (iii), the top layer, the side layer, and the bottom layer are exposed to the direct microwave, thereby reducing a wet etch relative rate of each of the top layer, the side layer, and the bottom layer, wherein a reduction of the wet etch relative rate of each of the side layer and the bottom layer is greater than that of the top layer. 3. The method according to claim 2 , wherein the recess pattern is constituted by trenches, each having a width of 10 nm to 60 nm, a depth of 30 nm to 300 nm, and an aspect ratio of 3 to 10. 4. The method according to claim 1 , wherein in step (ii), only the reforming gas is supplied to the reaction space. 5. The method according to claim 4 , wherein the reforming gas contains 0.1% to 99.9% by volume of He. 6. The method according to claim 5 , wherein the reforming gas contains less H 2 than He by volume. 7. The method according to claim 4 , wherein the reforming gas consists of He. 8. The method according to claim 1 , wherein the reforming gas consists of H 2 . 9. The method according to claim 1 , wherein the microwaves have a frequency of 800 MHz to 10 GHz. 10. The method according to claim 1 , wherein microwave power of emitting the microwaves is 500 W to 10,000 W. 11. The method according to claim 1 , wherein the substrate is placed on a susceptor, and the microwaves are emitted from an antenna provided above the susceptor in the reaction space. 12. The method according to claim 11 , wherein the antenna is a pole-type antenna, and no RF power is supplied to the susceptor in step (iii). 13. The method according to claim 1 , wherein step (iii) is conducted at a temperature of 20° C. to 300° C. 14. The method according to claim 1 , wherein the silicon oxide film has a thickness of 3 nm or more, and step (iii) continues until the silicon oxide film is reformed from its surface to a depth of 3 nm or more. 15. The method according to claim 1 , wherein in step (iii), reforming the silicon oxide is conducted by desorbing and releasing hydrogen from the silicon oxide film. 16. The method according to claim 15 , wherein steps (i) to (iii) are continuously repeated until a desired thickness of the reformed silicon oxide film is obtained. 17. The method according to claim 1 , wherein in step (i), the silicon oxide film on the substrate provided in the reaction space is a silicon oxide film deposited by plasma-enhanced ALD (PEALD) in a PEALD apparatus, and then transferred to the reaction space in a microwave plasma apparatus without exposing the substrate to air. 18. The method according to claim 1 , further comprising, after step (iii), subjecting the reformed silicon oxide film to wet etching. 19. The method according to claim 1 , which is conducted during a process of forming a 3D NAND flash memory. 20. The method according to claim 1 , wherein the oxide film with the desired depth has a wet etch relative rate (WERR) of 4.0 or lower.

Assignees

Inventors

Classifications

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • by chemical means · CPC title

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • the compound comprising silicon and nitrogen · CPC title

  • deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

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What does patent US11081345B2 cover?
A method of post-deposition treatment for silicon oxide film includes: providing in a reaction space a substrate having a recess pattern on which a silicon oxide film is deposited; supplying a reforming gas for reforming the silicon oxide film to the reaction space in the absence of a film-forming precursor, said reforming gas being composed primarily of He and/or H 2 ; and irradiating the refo…
Who is the assignee on this patent?
Asm Ip Holding Bv
What technology area does this patent fall under?
Primary CPC classification H10P14/69215. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 03 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).