Microelectromechanical device, method for manufacturing a microelectromechanical device, and method for manufacturing a system on chip using a CMOS process

US11078072B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11078072-B2
Application numberUS-202016861669-A
CountryUS
Kind codeB2
Filing dateApr 29, 2020
Priority dateApr 13, 2017
Publication dateAug 3, 2021
Grant dateAug 3, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a microelectromechanical systems (MEMS) device, includes forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a capacitive structure. Forming the capacitive structure includes arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a microelectromechanical systems (MEMS) device, the method comprising: forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate into the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a first capacitive structure comprising: arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a first direction perpendicular to the main surface area of the bulk semiconductor substrate; and depositing a sacrificial layer on the main surface area of the bulk semiconductor substrate to close the one or more trenches extending from the main surface area of the bulk semiconductor substrate to the cavity; structuring the sacrificial layer to obtain a structured sacrificial layer; and depositing a first electrode structure material into a structure of the structured sacrificial layer to arrange the first electrode structure on the movably suspended mass. 2. The method according to claim 1 , wherein forming the cavity in the bulk semiconductor substrate is performed by a silicon-on-nothing process. 3. The method according to claim 1 , further comprising: depositing an intermediate sacrificial layer on the first electrode structure to obtain a stack of sacrificial layers; depositing a second electrode structure material on the intermediate sacrificial layer; and structuring the second electrode structure material to form a second electrode structure. 4. The method according to claim 3 , further comprising: depositing a cap structure material on the second electrode structure and a remaining portion of the semiconductor material, wherein the cap structure material is connected to the second electrode structure; and removing the stack of sacrificial layers as to obtain the cap structure having attached the second electrode structure. 5. The method according to claim 4 , wherein: the method is a complementary metal-oxide-semiconductor (CMOS) process, and the cap structure is formed from an oxide in parallel to an oxide of an interlayer dielectric. 6. The method according to claim 1 , wherein at least one of arranging the cap structure on the main surface area of the bulk semiconductor substrate and forming the first capacitive structure is performed in a back end of line process. 7. The method according to claim 1 , further comprising: structuring the bulk semiconductor substrate to form the first electrode structure. 8. A method for manufacturing a microelectromechanical systems (MEMS) device, the method comprising: forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate into the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; forming a first capacitive structure comprising: arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a first direction perpendicular to the main surface area of the bulk semiconductor substrate; and forming spring elements that are connected to and between the movably suspended mass and the bulk semiconductor substrate such that the movably suspended mass is suspended from the bulk semiconductor substrate within the cavity via the spring elements, wherein the spring elements comprise an electrical connection configured to electrically connect the first electrode structure to the bulk semiconductor substrate. 9. A method for manufacturing a microelectromechanical systems (MEMS) device, the method comprising: forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate into the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a first capacitive structure comprising: arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a first direction perpendicular to the main surface area of the bulk semiconductor substrate, wherein: the main surface area extends in a second direction orthogonal to the first direction, and a projection of the first electrode structure and the second electrode structure are offset from each other in the second direction such that a first portion of the first electrode structure overlaps with a first portion of the second electrode structure in the first direction, a second portion of the first electrode structure does not overlap with the second electrode structure in the first direction, and a second portion of the second electrode structure does not overlap with the first electrode structure in the first direction perpendicular to the main surface area of the bulk semiconductor substrate partially overlaps with the first electrode structure. 10. A method for manufacturing a microelectromechanical systems (MEMS) device, the method comprising: forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate into the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; forming a first capacitive structure comprising: arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a first direction perpendicular to the main surface area of the bulk semiconductor substrate; and forming a second capacitive structure comprising: providing the first electrode structure arranged on the movably suspended mass; and arranging a third electrode structure at the cap structure adjacent to the second electrode structure, wherein the first electrode structure and the third electrode structure are spaced apart in the first direction perpendicular to the main surface area of the bulk semiconductor substrate. 11. The method according to claim 10 , wherein: the main surface area extends in a second direction orthogonal to the first direction, the first electrode structure and the second electrode structure are offset from each other in the second direction such that a first portion of the first electrode structure overlaps with a first portion of the second electrode structure in the first direction, a second portion of the first electrode structure does not overlap with the second electrode structure in the first direction, and a second portion of the second electrode structure does not overlap with the first electrode structure in the first direction, and the first electrode structure and the third electrode structure are offset from each other in the second direction such that the second portion of the first electrode overlaps with a first portion of the third electrode structure in th

Assignees

Inventors

Classifications

  • Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate · CPC title

  • Electrodes · CPC title

  • Trenches · CPC title

  • Translation according to an axis parallel to the substrate · CPC title

  • Cavities · CPC title

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What does patent US11078072B2 cover?
A method for manufacturing a microelectromechanical systems (MEMS) device, includes forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity; arranging a cap structure on the main surface area of the bulk semiconductor subs…
Who is the assignee on this patent?
Infineon Tech Dresden Gmbh & Co Kg
What technology area does this patent fall under?
Primary CPC classification B81C1/00246. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Aug 03 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).