System and method for digital memorized predistortion for wireless communication

Patent metadata

Field	Value
Publication number	US-10985965-B2
Application number	US-201816230750-A
Country	US
Kind code	B2
Filing date	Dec 21, 2018
Priority date	May 1, 2002
Publication date	Apr 20, 2021
Grant date	Apr 20, 2021

Abstract

A power amplifier system includes an input operable to receive an original value that reflects information to be communicated and an address data former operable to generate a digital lookup table key. The power amplifier system also includes a predistortion lookup table coupled to the address data former and a power amplifier having an output and coupled to the predistortion lookup table. The power amplifier system further includes a feedback loop providing a signal associated with the output of the power amplifier to the predistortion lookup table and a switch disposed in the feedback loop and operable to disconnect the predistortion lookup table from the output of the power amplifier.

First claim

What is claimed is:

1. A power amplifier system comprising:
an input operable to receive an input signal that reflects information to be communicated;
an address data former operable to generate a digital lookup table key based on the input signal;
a predistortion lookup table coupled to the address data former;
a time-delay memory table coupled to the address data former, the time-delay memory table storing one or more of information representing a linearity of a power amplifier and/or time-delay characteristics of channels;
the power amplifier having an output and coupled to the predistortion lookup table;
a feedback loop operable to provide a feedback signal associated with the output of the power amplifier to the predistortion lookup table, wherein the feedback signal is used to update the predistortion lookup table; and
a switch disposed in the feedback loop and operable to couple the output of the power amplifier and the predistortion lookup table during a training procedure and to decouple the output of the power amplifier from the predistortion lookup table after the training procedure has completed.

2. The power amplifier system of claim 1 , wherein the power amplifier system is a component of a mobile device.

3. The power amplifier system of claim 1 , wherein the power amplifier system is a component of a base station.

4. The power amplifier system of claim 1 , wherein the power amplifier system further comprises an I-Q address register coupling the time-delay memory table and the address data former.

5. The power amplifier system of claim 4 , wherein the feedback signal and an output signal of the time-delay memory table are used to update the predistortion lookup table.

6. The power amplifier system of claim 5 , wherein the switch is operable to couple an output of the time-delay memory table and the predistortion lookup table during the training procedure and to decouple the output of the time-delay memory table from the predistortion lookup table after the training procedure has completed.

7. The power amplifier system of claim 1 , further comprising an antenna coupled to the output of the power amplifier.

8. The power amplifier system of claim 1 , further comprising a switch controller operable to control the switch.

9. The power amplifier system of claim 1 , wherein a duration of the training procedure is less than 4 seconds.

10. The power amplifier system of claim 1 , wherein the input signal includes in-phase and quadrature components.

11. A method to operate a power amplifier system having a power amplifier, the method comprising:
receiving, at an input of the power amplifier system, an input signal that reflects information to be communicated;
generating, by an address data former, a digital lookup table key based on the input signal, the digital lookup table key being supplied to a predistortion lookup table and a time-delay memory table, the time-delay memory table storing one or more of information representing a linearity of a power amplifier and/or time-delay characteristics of channels;
generating, by the predistortion lookup table, a predistortion output based on the digital lookup table key;
generating, at an output of the power amplifier, an amplified signal based on the input signal and the predistortion output;
providing, by a feedback loop, a feedback signal associated with the amplified signal to the predistortion lookup table;
during a training procedure, coupling, by a switch disposed in the feedback loop, the output of the power amplifier and the predistortion lookup table; and
after completion of the training procedure, decoupling, by the switch, the output of the power amplifier from the predistortion lookup table.

12. The method of claim 11 , wherein the power amplifier is a component of a mobile device.

13. The method of claim 11 , wherein the power amplifier is a component of a base station.

14. The method of claim 11 , further comprising supplying, from the address data former and via an I-Q address register, the time-delay memory table the digital lookup table key.

15. The method of claim 14 , wherein the feedback signal and an output signal of the time-delay memory table are used to update the predistortion lookup table.

16. The method of claim 15 , wherein the switch is operable to couple an output of the time-delay memory table and the predistortion lookup table during the training procedure and to decouple the output of the time-delay memory table from the predistortion lookup table after the training procedure has completed.

17. The method of claim 11 , wherein an antenna is coupled to the output of the power amplifier.

18. The method of claim 11 , wherein a switch controller is operable to control the switch.

19. The method of claim 11 , wherein a duration of the training procedure is less than 4 seconds.

20. The method of claim 11 , wherein the input signal includes in-phase and quadrature components.

Assignees

• Dali Wireless Inc

Inventors

• Yang Dali
• Yang Jia

Classifications

• H03F3/24 Primary

  of transmitter output stages · CPC title

• H03F2201/3227

  Adaptive predistortion based on amplitude, envelope or power level feedback from the output of the main amplifier · CPC title

• H03F2201/3224

  Predistortion being done for compensating memory effects · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H04L27/368 Primary

  adaptive predistortion · CPC title