High efficiency linearization power amplifier for wireless communication

US10305521B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10305521-B2
Application numberUS-201715682431-A
CountryUS
Kind codeB2
Filing dateAug 21, 2017
Priority dateMay 1, 2002
Publication dateMay 28, 2019
Grant dateMay 28, 2019

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Abstract

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A method and a predistortion system for linearizing an output of a power amplifier include receiving a first input signal representative of an analog RF modulated signal of the predistortion system, receiving a digitized reference signal representative of an idealized reference signal, and receiving a digitized feedback signal representative of nonlinear characteristics of the power amplifier. The method further includes generating, using a lookup table, a predistortion correction signal based on an error between the digitized reference signal and the digitized feedback signal. The first input signal and the predistortion correction signal are combined to produce a predistortion signal that is supplied to the power amplifier to linearize the output of the power amplifier.

First claim

Opening claim text (preview).

What is claimed is: 1. A predistortion system for linearizing an output of a power amplifier, the predistortion system comprising: a first input operable to receive a first input signal representative of an analog RF modulated signal; a second input operable to receive a digitized reference signal representative of an idealized reference signal; a third input operable to receive a digitized feedback signal representative of nonlinear characteristics of the power amplifier; a predistortion controller operable to generate, using a lookup table, a predistortion correction signal based on a first error signal between the digitized reference signal and the digitized feedback signal; combining logic operable to combine the first input signal and the predistortion correction signal to produce a predistortion signal that is supplied to the power amplifier to linearize the output of the power amplifier; and error logic operable to determine the first error signal as a difference between a square of the digitized reference signal and a square of the digitized feedback signal. 2. The predistortion system of claim 1 , further comprising: a multiplier operable to multiply the first error signal by an adaptive factor. 3. The predistortion system of claim 1 , wherein the digitized reference signal and the digitized feedback signal each include an in-phase component and a quadrature component, and wherein the predistortion controller is operable to form a first component of the predistortion correction signal using the in-phase components and a second component of the predistortion correction signal using the quadrature components. 4. The predistortion system of claim 3 , wherein the predistortion controller is operable to perform a first lookup in the lookup table for the in-phase component of the digitized reference signal and a second lookup in the lookup table for the quadrature component of the digitized reference signal. 5. The predistortion system of claim 1 , wherein the lookup table receives, as a first lookup table input, an address derived from the digitized reference signal. 6. The predistortion system of claim 5 , wherein the predistortion controller further comprises an address former operable to generate the address based on the digitized reference signal. 7. The predistortion system of claim 5 , wherein the lookup table receives, as a second lookup table input, a second error signal derived from the first error signal and from a previous value output by the lookup table. 8. A method for linearizing an output of a power amplifier, the method comprising: receiving a first input signal representative of an analog RF modulated signal of a predistortion system; receiving a digitized reference signal representative of an idealized reference signal; receiving a digitized feedback signal representative of nonlinear characteristics of the power amplifier; generating, using a lookup table, a predistortion correction signal based on a first error signal between the digitized reference signal and the digitized feedback signal; combining the first input signal and the predistortion correction signal to produce a predistortion signal that is supplied to the power amplifier to linearize the output of the power amplifier; and determining the first error signal as a difference between a square of the digitized reference signal and a square of the digitized feedback signal. 9. The method of claim 8 , further comprising: multiplying the first error signal by an adaptive factor. 10. The method of claim 8 , further comprising: receiving, as a first input to the lookup table, an address derived from the digitized reference signal. 11. The method of claim 10 , further comprising: receiving, as a second input to the lookup table, a second error signal derived from the first error signal and from a previous value output by the lookup table. 12. The method of claim 8 , wherein the digitized reference signal and the digitized feedback signal each include an in-phase component and a quadrature component, the method further comprising: forming a first component of the predistortion correction signal using the in-phase components; and forming a second component of the predistortion correction signal using the quadrature components. 13. The method of claim 12 , further comprising: performing a first lookup in the lookup table for the in-phase component of the digitized reference signal; and performing a second lookup in the lookup table for the quadrature component of the digitized reference signal.

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Classifications

  • Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion · CPC title

  • with linearisation using predistortion · CPC title

  • with semiconductor devices only · CPC title

  • with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

  • H04B1/0475Primary

    with means for limiting noise, interference or distortion (H04B1/0483 takes precedence) · CPC title

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What does patent US10305521B2 cover?
A method and a predistortion system for linearizing an output of a power amplifier include receiving a first input signal representative of an analog RF modulated signal of the predistortion system, receiving a digitized reference signal representative of an idealized reference signal, and receiving a digitized feedback signal representative of nonlinear characteristics of the power amplifier. …
Who is the assignee on this patent?
Dali Wireless Inc
What technology area does this patent fall under?
Primary CPC classification H04B1/0475. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 28 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).