Method for forming a layer

Patent metadata

Field	Value
Publication number	US-10957590-B2
Application number	US-201916669082-A
Country	US
Kind code	B2
Filing date	Oct 30, 2019
Priority date	Nov 16, 2018
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.

First claim

What is claimed is:

1. A method for forming a semiconductor device, the method comprising:
forming a mask on a first surface of a first material by a selective deposition process, the mask having an edge portion extending over a second surface of a second material, the edge portion being in contact with a self-assembled monolayer;
removing the self-assembled monolayer to expose the second surface of the second material and to form a gap between the edge portion of the mask and the second surface of the second material;
forming a layer on the mask and the exposed second surface of the second material by an atomic layer deposition process, the gap being filled with the layer; and
removing at least a portion of the layer to expose at least a portion of the second surface of the second material.

2. The method of claim 1 , wherein the layer comprises the same material as the mask.

3. The method of claim 2 , further comprising forming a dielectric material on the mask and the portion of the second surface.

4. The method of claim 3 , further comprising forming a first trench in the dielectric material and a second trench in the second material.

5. The method of claim 4 , further comprising depositing a first electrically conductive material in the first and second trenches.

6. The method of claim 1 , wherein the layer comprises a different material than the mask.

7. The method of claim 6 , further comprising forming a dielectric material on the layer prior to the removing the portion of the layer.

8. The method of claim 7 , further comprising forming a first trench in the dielectric material to expose the portion of the layer prior to the removing the portion of the layer.

9. The method of claim 8 , further comprising forming a second trench in the second material.

10. The method of claim 9 , further comprising depositing a second electrically conductive material in the first and second trenches.

11. The method of claim 1 , wherein the mask comprises hafnium oxide, zirconium oxide, aluminum oxide, or titanium oxide.

12. The method of claim 11 , wherein the first material comprises cobalt or tungsten, and the second material comprises silicon carbide, silicon oxycarbide, silicon nitride, tungsten carbide, or tungsten oxide.

Assignees

• Applied Materials Inc

Inventors

• Wang Wenhui
• Dai Huixiong
• Ngai Christopher S
• Wu Liqi
• Zhang Wenyu
• Chen Yongmei
• Chen Hao
• WONG Keith Tatseun
• Chang Ke

Classifications

• H10P76/405

  characterised by their composition, e.g. multilayer masks · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P14/69395

  the material containing zirconium, e.g. ZrO2 · CPC title

• H10P14/69394

  the material containing titanium, e.g. TiO2 · CPC title

• H10P14/69392

  the material containing hafnium, e.g. HfO2 · CPC title