Substrate with antireflection coating and method for producing same
US-11906700-B2 · Feb 20, 2024 · US
US10943774B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10943774-B2 |
| Application number | US-201615775827-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 14, 2016 |
| Priority date | Nov 12, 2015 |
| Publication date | Mar 9, 2021 |
| Grant date | Mar 9, 2021 |
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The present disclosure relates to a sputtering arrangement, a vacuum coating system, and a method for carrying out HiPIMS coating methods; the sputtering arrangement has at least two different interconnection possibilities and the switch to the second interconnection possibility, in which two sputtering sub-assemblies are operated simultaneously with high power pulses, achieves a productivity gain.
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The invention claimed is: 1. A sputtering arrangement comprising: a number N of sputtering cathodes or sub-cathodes T i with i=1 to N, and a number n of sputtering power generators G j with j=1 to n, wherein N is a whole number and N≥2 and n is also a whole number and n≥2; said sputtering arrangement further comprising bridge switches Sbj for switching the power output Pj of the respective sputtering power generator Gj, and pulse switch Spi for distributing the respective power outputs Pj to the respective sputtering cathodes Ti; said sputtering arrangement is assembled so that it is operateable in at least two different interconnection variants, and: in a first interconnection variant, the respective power outputs P j of the n sputtering power generators G j are correspondingly interconnected by means of the bridge switches so that a total sputtering power P is supplied, which corresponds to the sum of the power outputs P j (P=Σ j=1 n Pj), and through a pulse sequence generation by means of the respective pulse switches, a sequence of power pulses with pulse power P and sequence period T is produced; the individual power pulses are chronologically distributed to the respective sputtering cathodes T i ; the sputtering cathodes are respectively supplied with power during a pulse time t i ; and the period T corresponds to the sum of the pulse times (T=Σ i=1 N t i ); and in a second interconnection variant, the sputtering cathodes are operated in at least two separate sputtering sub-arrangements A and B; in order to operate the sputtering sub-arrangements, the respective power outputs of a number nA of sputtering generators and a number nB of sputtering generators are correspondingly interconnected by means of the bridge switches so that a first pulse power P A (P A =Σ j=1 nA Pj) and a second pulse power P B (P B =Σ j=nA n Pj) are supplied, where nA+nB=n, and where through the respective generation of pulse sequence by means of the respective pulse switches, a respective first sequence of power pulses with the pulse power P A and a sequence period T A and second sequence of power pulses with the pulse power P B and a sequence period T B are produced; the individual power pulses are chronologically distributed to the sputtering cathodes of the respective sputtering sub-arrangements, where NA corresponds to the number of sputtering cathodes of the first sputtering sub-arrangement A and NB corresponds to the number of sputtering cathodes of the second sputtering sub-arrangement B, where NA+NB=N, and the sequence period T A corresponds to the sum of the pulse times for the sputtering cathodes of the first sputtering sub-arrangement A and the sequence period T B corresponds to the sum of the pulse times for the sputtering cathodes of the second sputtering sub-arrangement B (T A =Σ i=1 NA ti and T B =Σ i=NA N ti). 2. A vacuum coating system with a sputtering arrangement according to claim 1 , wherein the sputtering arrangement is assembled in such a way that during the execution of a sputtering method, high power pulses can be used, which permit the use of high sputtering power densities of 100 W/cm2 or greater. 3. The sputtering arrangement of claim 1 , wherein N=n. 4. The vacuum coating system of claim 2 , wherein N=n. 5. The sputtering arrangement of claim 1 , wherein PA=PB. 6. The vacuum coating system of claim 2 , wherein PA=PB. 7. The sputtering arrangement of claim 1 , wherein P=PA+PB. 8. The vacuum coating system of claim 2 , wherein P=PA+PB. 9. The sputtering arrangement of claim 1 , wherein NA=NB and/or nA=nB. 10. The vacuum coating system of claim 2 , wherein NA=NB and/or nA=nB. 11. A method for coating substrates by means of HiPIMS in which the HiPIMS method is carried out in a vacuum coating system with a sputtering arrangement, said sputtering arrangement comprising a number N of sputtering cathodes or sub-cathodes Ti with i=1 to N, and a number n of sputtering power generators Gj with j=1 to n, wherein N is a whole number and N≥2 and n is also a whole number and n≥2; the sputtering arrangement further comprising bridge switches Sbj for switching the power output Pj of the respective sputtering power generator Gj, and pulse switch Spi for distributing the respective power outputs Pj to the respective sputtering cathodes Ti; wherein the sputtering arrangement is assembled so that it is operateable in at least two different interconnection variants, and: in a first interconnection variant, the respective power outputs P j of the n sputtering power generators G j are correspondingly interconnected by means of the bridge switches so that a total sputtering power P is supplied, which corresponds to the sum of the power outputs P j (P=Σ j=1 n Pj), and through a pulse sequence generation by means of the respective pulse switches, a sequence of power pulses with pulse power P and sequence period T is produced; the individual power pulses are chronologically distributed to the respective sputtering cathodes T i ; the sputtering cathodes are respectively supplied with power during a pulse time t i ; and the period T corresponds to the sum of the pulse times (T=Σ i=1 N t i ); and in a second interconnection variant, the sputtering cathodes are operated in at least two separate sputtering sub-arrangements A and B; in order to operate the sputtering sub-arrangements, the respective power outputs of a number nA of sputtering generators and a number nB of sputtering generators are correspondingly interconnected by means of the bridge switches so that a first pulse power P A (P A =Σ j=1 nA Pj) and a second pulse power P B (P B =Σ j=nA n Pj) are supplied, where nA+nB=n, and where through the respective generation of pulse sequence by means of the respective pulse switches, a respective first sequence of power pulses with the pulse power P A and a sequence period T A and second sequence of power pulses with the pulse power P B and a sequence period T B are produced; the individual power pulses are chronologically distributed to the sputtering cathodes of the respective sputtering sub-arrangements, where NA corresponds to the number of sputtering cathodes of the first sputtering sub-arrangement A and NB corresponds to the number of sputtering cathodes of the second sputtering sub-arrangement B, where NA+NB=N, and the sequence period T A corresponds to the sum of the pulse times for the sputtering cathodes of the first sputtering sub-arrangement A and the sequence period T B corresponds to the sum of the pulse times for the sputtering cathodes of the second sputtering sub-arrangement B (T A =Σ i=1 NA and T B =Σ i=NA N ti). 12. The method according to claim 11 , wherein at least in order to deposit a layer by means of HiPIMS methods, the sputtering arrangement is switched to an interconnection variant with at least two sputtering sub-arrangements and a coating rate gain is achieved in comparison to a HiPIMS method carried out with the sputtering arrangement in the first interconnection variant. 13. The method of claim 11 , wherein the sputtering arrangement is assembled in such a way that during the execution of the method, high power pulses are useable, which permit the use of high sputtering power densities of 100 W/cm2 or greater. 14. The method of claim 13 , wherein the high sputtering power densities are 300 W/cm2 or greater. 15. The method of claim 11 , wherein N=n. 16. The method of claim 11 , wherein PA=PB. 17. The method of claim 11 , wherein P=PA+PB. 18. The method of claim 11 , wherein NA=NB and/or nA=nB.
Pulsed operation, e.g. HIPIMS · CPC title
Associated circuits · CPC title
using pulsed power to the target · CPC title
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