Fabrication of interlayer dielectrics with high quality interfaces for quantum computing devices
US-2019027672-A1 · Jan 24, 2019 · US
US10879905B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10879905-B2 |
| Application number | US-201916473550-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 12, 2019 |
| Priority date | Feb 14, 2018 |
| Publication date | Dec 29, 2020 |
| Grant date | Dec 29, 2020 |
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The various embodiments described herein include methods, devices, and systems for operating superconducting circuitry. In one aspect, a programmable circuit includes: (1) a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions; (2) a plurality of heat sources, each heat source thermally-coupled to, and electrically-isolated from, a respective narrow portion of the multi-dimensional array; and (3) a plurality of electrical terminals, each electrical terminal coupled to a respective wide portion of the multi-dimensional array.
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What is claimed is: 1. A programmable circuit, comprising: a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions; a plurality of heat sources, each heat source thermally-coupled to, and electrically-isolated from, a respective narrow portion of the multi-dimensional array; and a plurality of electrical terminals, each electrical terminal coupled to a respective wide portion of the multi-dimensional array. 2. The programmable circuit of claim 1 , wherein the plurality of heat sources is configured to selectively provide heat to the respective narrow portions sufficient to transition the respective narrow portions from a superconducting state to a non-superconducting state. 3. The programmable circuit of claim 1 , wherein a first subset of the plurality of heat sources are configured to provide a constant heat to the respective narrow portions sufficient to maintain the respective narrow portions in a non-superconducting state. 4. The programmable circuit of claim 3 , wherein a second subset of the plurality of heat sources are configured as logical inputs to the superconducting component. 5. The programmable circuit of claim 1 , wherein the superconducting component is configured to: operate in a first logical mode while a third subset of the plurality of heat sources is providing constant heat; and operate in a second logical mode while a fourth subset of the plurality of heat sources is providing constant heat. 6. The programmable circuit of claim 1 , wherein the superconducting component is arranged in a two-dimensional array. 7. The programmable circuit of claim 1 , wherein the superconducting component is patterned from a single thin film of superconducting material. 8. The programmable circuit of claim 1 , wherein each narrow portion of the multi-dimensional array has substantially the same shape. 9. The programmable circuit of claim 1 , further comprising a current source coupled to the superconducting component, the current source configured to, in the absence of heat from the plurality of heat sources, maintain the superconducting component in a superconducting state. 10. The programmable circuit of claim 1 , further comprising an output circuit coupled to at least a subset of the plurality of electrical terminals. 11. The programmable circuit of claim 1 , wherein one or more of the plurality of electrical terminals are coupled to a reference node. 12. A method of operating a programmable circuit, comprising: providing a first current to a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions, the first current configured to maintain the superconducting component in a superconducting state; configuring the superconducting component to perform a first logical operation by providing constant heat to a first subset of the narrow portions, the constant heat configured to transition the first subset of the narrow portions from the superconducting state to a non-superconducting state; while the superconducting component is configured to perform the first logical operation: receiving one or more inputs via a second subset of the narrow portions, distinct from the first subset; and obtaining an electrical output via a subset of the wide portions, the electrical output corresponding to a result of the first logical operation on the one or more inputs. 13. The method of claim 12 , further comprising: configuring the superconducting component to perform a second logical operation, distinct from the first logical operation, by providing constant heat to a third subset of the narrow portions, the constant heat configured to transition the third subset of the narrow portions from the superconducting state to the non-superconducting state; while the superconducting component is configured to perform the second logical operation: receiving one or more second inputs via a fourth subset of the narrow portions, distinct from the third subset; and obtaining a second electrical output via a second subset of the wide portions, the second electrical output corresponding to a result of the second logical operation on the one or more second inputs. 14. The method of claim 12 , wherein the first logical operation is selected from a group consisting of: a logical AND operation; a logical OR operation; a majority gate operation; and an input counting operation. 15. The method of claim 12 , wherein the one or more inputs comprise heat inputs configured to transition the second subset of the narrow portions from the superconducting state to the non-superconducting state. 16. The method of claim 12 , wherein configuring the superconducting component to perform the first logical operation comprises coupling one or more of the wide portions to a reference node.
using superconductive devices · CPC title
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Electric circuits {(for command of an exposure part G03B7/02)} · CPC title
Electricity · mapped topic
Electricity · mapped topic
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