Superconducting three-terminal device and logic gates

Patent metadata

Field	Value
Publication number	US-10171086-B2
Application number	US-201414775118-A
Country	US
Kind code	B2
Filing date	Mar 11, 2014
Priority date	Mar 11, 2013
Publication date	Jan 1, 2019
Grant date	Jan 1, 2019

Abstract

A three-terminal device that exhibits transistor-like functionality at cryogenic temperatures may be formed from a single layer of superconducting material. A main current-carrying channel of the device may be toggled between superconducting and normal conduction states by applying a control signal to a control terminal of the device. Critical-current suppression and device geometry are used to propagate a normal-conduction hotspot from a gate constriction across and along a portion of the main current-carrying channel. The three-terminal device may be used in various superconducting signal-processing circuitry.

First claim

What is claimed is:

1. A three-terminal device comprising:
a main channel connecting a first terminal and a second terminal;
a gate channel connecting a control terminal to the main channel; and
a low-resistance constriction formed in the gate channel between the control terminal and the main channel, wherein the constriction is configured to increase a gate current density proximal to the main channel and the constriction is located within approximately 200 nm of an edge of the main channel.

2. The three-terminal device of claim 1 , wherein the main channel, gate channel, and constriction are patterned from a single layer of superconducting material.

3. The three-terminal device of claim 2 , wherein the superconducting material comprises NbN, YBaCuO, HgTlBaCaCuO, MgB 2 , BISCCO, Nb, NbTiN, NbCN, Al, AlN, WSi, Ga, In, Sn, Pb, or MoGe.

4. A three-terminal device comprising:
a main channel connecting a first terminal and a second terminal;
a gate channel connecting a control terminal to the main channel; and
a low-resistance constriction formed in the gate channel between the control terminal and the main channel, wherein the constriction is configured to increase a gate current density proximal to the main channel, wherein the constriction is located within approximately two diffusion lengths of a far edge of the main channel at an intersection with the gate channel, wherein one diffusion length L D is given by the following expression
L D =√{square root over ( D e τ r )}

where D e is the diffusion constant for electrons in a superconducting material from which the gate channel is formed and τ r is the recombination time for hot electrons in the superconducting material in a superconducting state.

5. The three-terminal device of claim 1 , wherein the main channel further comprises a narrowed portion extending for a length along the main channel and an intersection of the gate channel with the main channel occurs within the length of the narrowed portion.

6. The three-terminal device of claim 1 , wherein the main channel further comprises a narrowed portion extending for a length along the main channel and an intersection of the gate channel with the main channel occurs within the length of the narrowed portion and wherein a width of the narrowed portion is less than approximately three diffusion lengths, wherein one diffusion length L D is given by the following expression
L D =√{square root over ( D e τ r )}

where D e is the diffusion constant for electrons in a superconducting material from which the gate channel is formed and τ r is the recombination time for hot electrons in the superconducting material in a superconducting state.

7. The three-terminal device of claim 5 , wherein the intersection is located within a downstream half of the length of the narrowed portion.

8. A three-terminal device comprising:
a main channel connecting a first terminal and a second terminal;
a gate channel connecting a control terminal to the main channel;
a low-resistance constriction formed in the gate channel between the control terminal and the main channel, wherein the constriction is configured to increase a gate current density proximal to the main channel; and
periodic width modulations formed in the main channel and located near a junction of the gate channel with the main channel.

9. The three-terminal device of claim 1 , further comprising:
an output terminal connected to the first terminal; and
a resistor connected in series with the output terminal.

10. The three-terminal device of claim 9 , wherein a resistance of the resistor is any value up to 200,000 ohms.

11. The three-terminal device of claim 9 , further comprising a sensor connected to the control terminal and configured to provide a signal representative of a sensed physical parameter to the control terminal.

12. The three-terminal device of claim 11 , wherein the sensor comprises a superconducting single-photon detector.

13. The three-terminal device of claim 11 , wherein the sensor comprises a radio frequency, microwave, or terahertz sensor.

14. The three-terminal device of claim 9 , further comprising a SQUID having its output terminal connected to the control terminal.

15. The three-terminal device of claim 9 , connected in a circuit comprising an RSFQ system, wherein the three-terminal device is configured to receive a signal from the RSFQ system.

16. A method of operating a three-terminal device fabricated from a superconducting material, the method comprising:
placing the three-terminal device in a superconducting state, such that a main channel between a first terminal and a second terminal is superconducting;
applying a control signal to a constriction in a gate channel that connects a control input to the main channel, such that current at the constriction exceeds a superconducting critical current level at the constriction;
propagating a normal-conduction hotspot that suppresses a superconducting critical current value from the constriction to the main channel; and
forming a stable resistive plug in the main channel.

17. The method of claim 16 , further comprising diverting current from the main channel to an output terminal that is connected to the first terminal.

18. The method of claim 17 , further comprising driving a load connected to the output terminal, wherein the load has a resistance value up to 200,000 Ohms.

19. The method of claim 16 , wherein the hotspot is propagated to a narrowed portion of the main channel, the narrowed portion extending a length along the main channel.

20. The method of claim 19 , wherein an intersection of the gate channel and main channel is located within a downstream half of the length of the narrowed portion of the main channel.

21. The method of claim 16 , further comprising:
applying a bias current to the main channel; and
receiving an output signal from the first terminal.

22. The method of claim 21 , further comprising receiving the control signal from a sensor that is connected to the gate channel.

23. The method of claim 16 , wherein the main channel, gate channel, and constriction are formed from a single layer of superconducting material.

24. A multi-input OR gate comprising:
a main channel connecting a first terminal and a second terminal;
at least two gate channels connecting at least two control terminals to the main channel; and
at least two low-resistance constrictions formed in the at least two gate channels between the at least two control terminals and the main channel, wherein each constriction is configured to increase a gate current density proximal to the main channel, wherein the constrictions are located within approximately two diffusion lengths of a far edge of the main channel at each intersection with each gate channel, wherein one diffusion length L D is given by the following expression
L D =√{square root over ( D e τ r )}

where D e is the diffusion constant for electrons in a superconducting material from which the gate channel is formed and τ r is the recombination time for hot electrons in the superconducting material in a superconducting state.

25. The OR gate of claim 24 , wherein the main channel, gate channels, and constrictions are patterned from a single layer of superconducting material.

Assignees

• Massachusetts Inst Technology

Inventors

• Mccaughan Adam N
• Berggren Karl K

Classifications

• G11C11/44

  using super-conductive elements, e.g. cryotron · CPC title

• H03K19/20

  characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence) · CPC title

• H03K19/195 Primary

  using superconductive devices · CPC title

• H01L39/025

  Electricity · mapped topic

• H01L39/145

  Electricity · mapped topic