Method and device for measurement of a plurality of semiconductor chips in a wafer array

Patent metadata

Field	Value
Publication number	US-10867873-B2
Application number	US-201716323237-A
Country	US
Kind code	B2
Filing date	Jul 25, 2017
Priority date	Aug 4, 2016
Publication date	Dec 15, 2020
Grant date	Dec 15, 2020

Abstract

A method and a device for measuring a plurality of semiconductor chips in a wafer array are disclosed. In an embodiment a method for measuring the semiconductor chips in a wafer array, wherein the wafer array is arranged on an electrically conductive carrier so that in each case back contacts of the semiconductor chips are contacted by the carrier, wherein a contact structure is arranged on a side of the wafer array facing away from the carrier, and wherein the contact structure includes a contact element and/or a plurality of radiation-emitting measurement semiconductor chips, includes applying a voltage between the contact structure and the carrier and measuring the semiconductor chips depending on a luminous image which is generated by emitted radiation which is caused simultaneously by fluorescence when the semiconductor chips are illuminated or by a radiation-emitting operation of the measurement semiconductor chips when the voltage is applied.

First claim

The invention claimed is:

1. A method for measuring a plurality of semiconductor chips in a wafer array, wherein the wafer array is arranged on an electrically conductive carrier so that in each case back contacts of the semiconductor chips are contacted by the carrier, wherein a contact structure is arranged on a side of the semiconductor chips facing away from the carrier, and wherein the contact structure comprises a contact element and/or a plurality of radiation-emitting measurement semiconductor chips, the method comprising:
applying a voltage between the contact structure and the carrier; and
measuring the semiconductor chips depending on a luminous image which is generated by emitted radiation which is caused simultaneously by fluorescence when the semiconductor chips are illuminated or by a radiation-emitting operation of the measurement semiconductor chips when the voltage is applied, wherein the luminous image comprises a plurality of luminous points, and wherein each luminous point is uniquely assigned to exactly one of the semiconductor chips.

2. The method according to claim 1 , further comprising an electrically conductive layer arranged between the semiconductor chips and the contact structure, wherein the electrically conductive layer contacts front contacts of the semiconductor chips.

3. The method according to claim 2 , wherein the electrically conductive layer is designed such that the front contacts of the semiconductor chips are contacted separately from the front contacts of laterally adjacent semiconductor chips.

4. The method according to claim 2 , wherein the contact structure and the electrically conductive layer are jointly applied to the wafer array in one step.

5. The method according to claim 2 ,
wherein the electrically conductive layer comprises a polymer, or
wherein the electrically conductive layer has a layer thickness between 100 nm and 1 mm, or
wherein the electrically conductive layer is isotropically conductive, or
wherein the electrically conductive layer has a specific electrical resistance between 0.001×10 −2 Ωm and 0.01×10 −2 Ωm.

6. The method according to claim 2 , wherein the electrically conductive layer is substantially flat.

7. The method according to claim 2 , wherein the electrically conductive layer is designed to selectively limit a current flow between the contact structure and the front contacts of the semiconductor chips.

8. The method according to claim 1 ,
wherein the contact structure consists essentially of a metal contact element, or
wherein the contact structure consists of an interconnection of a plurality of radiation-emitting measurement semiconductor chips.

9. The method according to claim 1 ,
wherein the voltage between the contact structure and the carrier in a reverse direction of the semiconductor chips is selected to be high such that reversely weak semiconductor chips are damaged, and
wherein those semiconductor chips in the wafer array that emit radiation during illumination are classified as intact.

10. The method according to claim 1 ,
wherein, when the contact structure comprises radiation-emitting measurement semiconductor chips, a voltage in a flow direction of the semiconductor chips is larger than a sum of a threshold voltage of a measurement semiconductor chip when the voltage drops at the electrically conductive layer,
wherein the contact structure is applied to the wafer array such that each semiconductor chip in the wafer array is assigned in each case to at least one measurement semiconductor chip which is arranged in series in the flow direction of a semiconductor chip in the wafer array,
wherein those measurement semiconductor chips are determined which emit radiation at the applied voltage, and
wherein those semiconductor chips in the wafer array to which none of the radiation-emitting measurement semiconductor chips is assigned are classified as intact.

11. The method according to claim 10 , wherein the voltage in the flow direction of the semiconductor chips is smaller than a sum of the threshold voltage of a semiconductor chip in the wafer array when the voltage drops at the electrically conductive layer.

12. The method according to claim 10 , wherein measuring the semiconductor chips depending on the luminous image comprises:
setting the applied voltage to at least one predetermined characteristic value;
determining in each case a brightness characteristic value of the measurement semiconductor chips, the brightness characteristic value being representative for a brightness of the emitted radiation; and
inferring a current density which flows through the respective semiconductor chip depending on the determined brightness characteristic value.

13. The method according to claim 2 ,
wherein, when the contact structure comprises the radiation-emitting measurement semiconductor chips, the voltage in a reverse direction of the semiconductor chips is larger than a sum of a threshold voltage of a measurement semiconductor chip when the voltage drops at the electrically conductive layer,
wherein the contact structure is applied to the wafer array such that each semiconductor chip in the wafer array is assigned in each case to at least one measurement semiconductor chip which is arranged in series against a flow direction of a semiconductor chip in the wafer array,
wherein those measurement semiconductor chips are determined which emit radiation at the applied voltage, and
wherein those semiconductor chips in the wafer array to which none of the radiation-emitting measurement semiconductor chips is assigned are classified as intact.

Assignees

• Osram Opto Semiconductors Gmbh
• Osram Oled Gmbh

Inventors

• Specht Holger
• Zeisel Roland
• Vogl Anton
• Ebbecke Jens

Classifications

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• G01R31/311 Primary

  of integrated circuits {(G01R31/31728 takes precedence)} · CPC title

• G01R31/2656

  using non-ionising electromagnetic radiation, e.g. optical radiation · CPC title

• G01R31/2601

  Apparatus or methods therefor (G01R31/2607, G01R31/2642 take precedence) · CPC title

• H01L22/12 Primary

  Electricity · mapped topic