Die attach methods and semiconductor devices manufactured based on such methods

US10832992B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10832992-B2
Application numberUS-201916518351-A
CountryUS
Kind codeB2
Filing dateJul 22, 2019
Priority dateAug 4, 2016
Publication dateNov 10, 2020
Grant dateNov 10, 2020

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method includes providing a carrier, depositing a die attach material on the carrier, and arranging a semiconductor die on the die attach material, wherein a main surface of the semiconductor die facing the die attach material at least partly contacts the die attach material, wherein immediately after arranging the semiconductor die on the die attach material, a first maximum extension of the die attach material over edges of the main surface is less than about 100 micrometers.

First claim

Opening claim text (preview).

What is claimed is: 1. A method, comprising: providing a carrier; depositing a die attach material on the carrier; arranging a semiconductor die on the die attach material; and forming a fillet of the die attach material at a side surface of the semiconductor die, wherein forming the fillet is exclusively based on a creeping of the die attach material along the side surface of the semiconductor die, wherein the carrier comprises a planar die mounting surface, wherein an exposed region of the planar die mounting surface has a greater surface area than a surface area of the die attach material such that there are no lateral barriers preventing the die attach material from extending across the exposed region during the formation of the fillet, and wherein immediately after arranging the semiconductor die on the die attach material an exposed region of the planar die mounting surface intersects with an outer boundary of the die attach material reaching the first maximum extension such that there are no lateral barriers preventing the die attach material from extending across the exposed region further than the first maximum extension. 2. The method of claim 1 , wherein a thermal conductivity of the die attach material is greater than about 0.5 W/(m·K), wherein the die attach material comprises a polymeric material and at least one of electrically conductive and thermally conductive filler particles, and wherein the filler particles have a diameter of greater than 50 nm and less than 9 μm. 3. The method of claim 1 , further comprising: forming portions of the die attach material extending over edges of a main surface of the semiconductor die facing the die attach material, wherein a maximum extension of the die attach material over the edges of the main surface is less than about 200 micrometers. 4. A method, comprising: providing a carrier; depositing a die attach material on the carrier; and arranging a semiconductor die on the die attach material, wherein a main surface of the semiconductor die facing the die attach material at least partly contacts the die attach material, wherein immediately after arranging the semiconductor die on the die attach material, a first maximum extension of the die attach material over edges of the main surface is less than about 100 micrometers, and wherein the carrier comprises a planar die mounting surface; and wherein immediately after arranging the semiconductor die on the die attach material an exposed region of the planar die mounting surface intersects with an outer boundary of the die attach material reaching the first maximum extension such that there are no lateral barriers preventing the die attach material from extending across the exposed region further than the first maximum extension. 5. The method of one of claim 4 , further comprising: after arranging the semiconductor die on the die attach material, further extending the die attach material over the edges of the main surface and across the exposed region of the planar die mounting surface, wherein after further extending the die attach material a second maximum extension of the die attach material over the edges of the main surface is less than about 200 micrometers, the second maximum extension being greater than the first maximum extension. 6. The method of claim 4 , wherein a thermal conductivity of the die attach material is greater than about 0.5 W/(m·K), wherein the die attach material comprises a polymeric material and at least one of electrically conductive and thermally conductive filler particles, and wherein the filler particles have a diameter of greater than 50 nm and less than 9 μm. 7. The method of claim 4 , further comprising: forming a fillet of the die attach material at a side surface of the semiconductor die, wherein forming the fillet is based on a creeping of the die attach material along the side surface of the semiconductor die. 8. The method of claim 4 , further comprising: curing the die attach material at a curing time in a range from about 10 minutes to about 3 hours and a curing temperature in a range from about 100 degrees Celsius to about 300 degrees Celsius. 9. The method of claim 7 , wherein the creeping of the die attach material is based on an adhesive force between the die attach material and the semiconductor die. 10. A method, comprising: providing a carrier; providing a semiconductor die; arranging a die attach material between the carrier and the semiconductor die; and forming a fillet in the die attach material, wherein a fillet height of the die attach material is less than about 95% of a height of the semiconductor die, wherein a maximum extension of the die attach material over edges of a main surface of the semiconductor die facing the die attach material is less than about 200 micrometers (μm), wherein a thermal conductivity of the die attach material is greater than about 0.5 W/(m-K), wherein the die attach material comprises a polymeric material and at least one of electrically conductive and thermally conductive filler particles, wherein the filler particles have a diameter of greater than 0.05 μm and less than 9 μm, and wherein immediately after arranging the semiconductor die on the die attach material an exposed region of the planar die mounting surface intersects with an outer boundary of the die attach material reaching the first maximum extension such that there are no lateral barriers preventing the die attach material from extending across the exposed region further than the first maximum extension.

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What does patent US10832992B2 cover?
A method includes providing a carrier, depositing a die attach material on the carrier, and arranging a semiconductor die on the die attach material, wherein a main surface of the semiconductor die facing the die attach material at least partly contacts the die attach material, wherein immediately after arranging the semiconductor die on the die attach material, a first maximum extension of the…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W72/073. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).