Printed circuit board

Patent metadata

Field	Value
Publication number	US-10827615-B1
Application number	US-202016817780-A
Country	US
Kind code	B1
Filing date	Mar 13, 2020
Priority date	Jan 6, 2020
Publication date	Nov 3, 2020
Grant date	Nov 3, 2020

Abstract

A printed circuit board includes a substrate having a first surface and a second surface, opposite to the first surface, and having a through-portion penetrating between the first surface and the second surface; and a through-via disposed in at least a portion of the through-portion, wherein the through-via includes a first metal layer having a first groove portion facing an interior of the through-portion from the first surface of the substrate and a second groove portion facing the interior of the through-portion from the second surface of the substrate, and the first metal layer has a first region, and a second region, having different average grain sizes.

First claim

What is claimed is:

1. A printed circuit board, comprising:
a substrate having a first surface and a second surface, opposite to the first surface, and having a through-portion penetrating between the first surface and the second surface; and
a through-via disposed in at least a portion of the through-portion,
wherein the through-via comprises a first metal layer having a first groove portion facing an interior of the through-portion from the first surface of the substrate and a second groove portion facing the interior of the through-portion from the second surface of the substrate, and
the first metal layer has a first region, and a second region, having different average grain sizes.

2. The printed circuit board of claim 1 , wherein the first region of the first metal layer comprises a first-first region facing an interior of the first metal layer from a surface of the first groove portion and a first-second region facing the interior of the first metal layer from a surface of the second groove portion,
the second region of the first metal layer is disposed between the first-first region and the first-second region, and
each average grain size in the first-first region and the first-second region is greater than an average grain size in the second region.

3. The printed circuit board of claim 2 , wherein a sum of a thickness of the first-first region and a thickness of the first-second region is greater than a thickness of the second region between the first-first region and the first-second region.

4. The printed circuit board of claim 3 , wherein each of the thickness of the first-first region and the thickness of the first-second region is greater than the thickness of the second region between the first-first region and the first-second region.

5. The printed circuit board of claim 2 , wherein the first-first region of the first metal layer has a convex shape in which a width of a cross-section decreases after increasing from the surface of the first groove portion facing the interior of the first metal layer, and
the first-second region of the first metal layer has a convex shape a width of a cross-section decreases after increasing from the surface of the second groove portion facing the interior of the first metal layer.

6. The printed circuit board of claim 2 , wherein the first metal layer further comprises a third region including a third-first region extending from a wall surface of the through-portion and surrounding at least a portion of the first-first region and a third-second region extending from the wall surface of the through-portion and surrounding at least a portion of the first-second region.

7. The printed circuit board of claim 1 , wherein the through-via further comprises a second metal layer disposed on the first metal layer, and
the second metal layer is disposed in at least a portion of each of the first groove portion and the second groove portion.

8. The printed circuit board of claim 7 , wherein a thickness of the first metal layer is greater than a sum of a thickness of a region disposed in the first groove portion of the second metal layer and a thickness of a region disposed in the second groove portion of the second metal layer.

9. The printed circuit board of claim 7 , wherein a thickness of the first metal layer is greater than a thickness of a region disposed in the first groove portion of the second metal layer and a thickness of a region disposed in the second groove portion of the second metal layer, respectively.

10. The printed circuit board of claim 7 , wherein each of the first metal layer and the second metal layer extends on the first surface of the substrate and the second surface of the substrate, respectively.

11. The printed circuit board of claim 10 , further comprising a third metal layer disposed on a wall surface of the through-portion, the first surface of the substrate, and the second surface of the substrate, respectively, the third metal layer being covered with the first metal layer.

12. The printed circuit board of claim 11 , wherein the through-via further comprises a fourth metal layer disposed on the first surface of the substrate and the second surface of the substrate, respectively, the fourth metal layer being covered with the third metal layer.

13. The printed circuit board of claim 1 , wherein the substrate comprises a plurality of insulating layers, a plurality of wiring layers disposed on each of the plurality of insulating layers, respectively, and a plurality of via layers respectively penetrating of the plurality of insulating layers and connecting of the plurality of wiring layers to each other.

14. The printed circuit board of claim 13 , wherein the through-via is connected to at least one of the plurality of wiring layers.

15. The printed circuit board of claim 1 , further comprising a build-up layer including an insulating layer disposed on at least one surface of the first surface or the second surface of the substrate, a wiring layer disposed on the insulating layer, and a via layer penetrating the insulating layer and connecting the through-via and the wiring layer,
wherein a thickness of the substrate is greater than a thickness of the insulating layer.

16. A printed circuit board, comprising:
a substrate having a first surface and a second surface, opposite to the first surface, and having a through-portion penetrating between the first surface and the second surface; and
a through-via disposed in at least a portion of the through-portion,
wherein the through-via comprises first grains and second grains,
a region, in which the first grains are disposed, is disposed between regions in which the second grains are disposed,
the first grains and the second grains having different average grain sizes, and
a width of each of the regions in which the second grains are disposed, first increases and then decreases in a direction from the first surface to second surface or from the second surface to the first surface.

17. The printed circuit board of claim 16 , wherein the average grain size of the first grains is less than the average grain size of the second grains.

18. The printed circuit board of claim 16 , wherein the regions, in which the second grains are disposed, each has a groove portion facing an interior of the through-portion.

19. The printed circuit board of claim 18 , further comprising a metal layer disposed in each groove portion.

20. The printed circuit board of claim 19 , wherein an average grain size of grains in the metal layer is less than the average grain size of the second grains.

Assignees

• Samsung Electro Mech

Inventors

• Choi Jong Chan
• Jeong Young Kwon
• Kim Min Soo
• Mun Seong Jae

Classifications

• H05K1/115 Primary

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H05K1/0298

  Multilayer circuits · CPC title

• H05K2201/09563

  Metal filled via · CPC title

• H05K3/4644

  by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602) · CPC title

• H05K1/0206

  by printed thermal vias · CPC title